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August 2002

DesignerCouncil@IPC.ORG

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Subject:
From:
Roger Lu <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Fri, 2 Aug 2002 09:13:05 +0800
Content-Type:
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----- Original Message -----
From: "Jack C. Olson" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, July 31, 2002 10:07 PM
Subject: Re: [DC] IPC 2221


> ARE YOU JOKING...???
>
> (or should I really try to answer that?)
>
> Jack
>
>
>
>
>
> Louis Dallara <[log in to unmask]>
> 27Jul2002 10:25 AM
>
>
> To:   "(Designers Council Forum)" <[log in to unmask]>
>       "Jack C. Olson" <[log in to unmask]>
> cc:
>
> Subject:  RE: [DC] IPC 2221
> Retain Until: 08/26/2002 Retention Category: G90 - Information and Reports
> Caterpillar Confidential:  Green
>
>
> Who designs to minimums ????
>
> -----Original Message-----
> From: DesignerCouncil [mailto:[log in to unmask]]On Behalf Of Jack
> C. Olson
> Sent: Thursday, July 25, 2002 9:52 AM
> To: [log in to unmask]
> Subject: Re: [DC] IPC 2221
>
>
> Be careful that you didn't misunderstand what they said, you might want
> to ask them for clarification. According to IPC your minimum annular ring
> (if that is what they meant by hole to pad edge) can be 1-2 mils,
depending
> on your board requirements, or .025-.052mm to keep the units straight.
>
> What I suspect they meant was that a drilled hole to conductor should be
> that distance. For example, say you remove the unused pads from inner
> layers,
> so what distance away do you keep your traces from this hole with no pad?
> They may be recommending .6mm, but from my experience .35mm is more
> typical.
>
> In any case, to maintain a hole edge to hole pad of .6 and accounting for
> misregistration (even if you are using a minimum fab tolerance of .25mm
> for a level c board less than 8 layers and less than 300mm long as shown
> in Table 9-1), board layout would be almost impossible.
>
> Maybe I missed it, but I don't see a "set in stone" value .6mm anywhere in
> the document.
> I would ask for clarification. (and I would buy a copy of IPC-2221)
>
> good luck,
> Jack
>
>
>
>
>
> Dave Sharples <[log in to unmask]>@IPC.ORG>
> 24Jul2002 11:04 PM
>
> Please respond to "(Designers Council Forum)" <[log in to unmask]>;
>      Please respond to Dave Sharples <[log in to unmask]>
>
> Sent by:  DesignerCouncil <[log in to unmask]>
>
>
>
> To:   [log in to unmask]
> cc:
>
> Subject:  [DC] IPC 2221
> Retain Until: 08/23/2002 Retention Category: G90 - Information and Reports
> Caterpillar Confidential:  Green
>
>
> Hi,
>
> I do not have quick access to ICP 275 and IPC 2221.
>
> I am told by my PCB supplier that the distance from hole edge to pad edge
> should not be less than 0.5 mm in IPC 275 and 0.6 mm in IPC 2221 for the
> design of through hole vias.
>
> If this is so how do you fanout fine pitch BGA components or even 35 mil
> pads on 50 mil pitch.
>
> Is there a tolerance on missregistration in the Mil 55110 spec.
>
> Your help will be most appreciated.
>
> Regards,
>
> Dave Sharples
> www.pcbdesign.co.za
> + 27 (0) 72 397 5824
>
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