Hi Allen,
Several plausible things at work here. First off, the increased trace width *will* lower the impedance and in turn facilitates faster rise times. This is true and if he needs precision, it can be expected that he has a value for the absolute maximum trace impedance allowable for his circuit. This shouldn't be your responsibility to know, but you can, as you'd stated, using the layer stackup, dielectrioc values, copper weight, etc. ascertain just how wide the trace needs to be to match his impedance requirements.
The other side of the fence is for incoming signals. When electrons transistion from two conductors of differing impedances, a reflection is created. Now we engineers have all sorts of fun ways to handle this and many times do so, unbenounced to the designer (by the inclusion of termination resistors which impede the flow of electrons in the opposite direction). But the bottom line is that this too is a possible issue and it needs to be considered when you're laying things out, in the case of 'mission critical' signals.
If the engineer is just blowing smoke and uses impedance as a way of making his point, then that's unfortunate. Fact of the matter is, there are times where it's important and times when it is not. When you deal with high-speed signals, obviously switching speeds are critical, as well as the power systems ability to respond (the reason we use bypass capcitors - sometimes even two).
I would suggest you ask exactly what he's trying to achieve and then get a number - specifically a value in Ohms - that you can use to design to his/her requirements. If he doesn't have one, then that's a good sign he's blowing smoke but you may just try to appease him none the less. Sometimes engineering is not as exact a science as we'd hope and the fact is, often times I find myself doing things on a hunch...i.e. guessing what evntualities *may* occur.
On your side, and anyone intersted in the science of high-speed, look at any one of Howard Johnson's books, including the High Speed Digital Design book. It may get muddy at times with numbers but I beleive that any good designer will walk away with a better appreciation of what they can do to help us engineers, and more than once, I've had designers catch things, suggest things, etc. that I hadn't thought of.
Cheers,
Joe
"Allen T. Maddox" <[log in to unmask]> wrote:
JaMi
I wouldn't say it's controlled impedance, because I don't have a specific number to go by. The Engineer just said he needs better impedance. Has to do with the rise time of the signal edge. Should I be getting a number and using one of the impedance calculators to hold to something specific? Am I asking the engineer the wrong questions?
Allen Maddox C.I.D.
Sr. PC Board Designer
GAI-Tronics, Corp
610-796-5854
PO Box 1060
Reading, PA 19607-1060
[log in to unmask]
www.gai-tronics.com
>>> [log in to unmask] 08/01/05 10:50PM >>>
.. . . sorry for shooting a blank there - mouse finger not engaged to brain
syndrome - double clicking the "Reply" button will do it every time . . .
Allen and the group,
Some of these responses are right on point, such as the different design critera for
different design perspectives, such as power supply verses high speed design, but
then again some of these responses are even getting hard for me to comprehend, but
one question that keeps comming to my mind, that appears to be popping up but not
dealt with, is whether or not there are any controlled impedance traces are being
used, since there the "stack up" will dictate the actual trace width. Is this a
factor?
JaMi
----- Original Message -----
From: "Allen T. Maddox"
To:
Sent: Friday, July 29, 2005 7:57 AM
Subject: Re: [DC] Trace width ratio to pad
Yes, this is the train of thought and the argument for wider traces. But is it
necessary for all nets?
Allen Maddox C.I.D.
Sr. PC Board Designer
GAI-Tronics, Corp
610-796-5854
PO Box 1060
Reading, PA 19607-1060
[log in to unmask]
www.gai-tronics.com
>>> [log in to unmask] 07/29/05 10:45AM >>>
Ummm, I'm not so sure about Joe's statement. Shouldn't that read "more
copper will give less resistance and result in less impedance (less
inductance, more capacitance) all else being the same?"
Roger
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of
Matthew Lamkin
Sent: Friday, July 29, 2005 10:32 AM
To: [log in to unmask]
Subject: Re: [DC] Trace width ratio to pad
Ah, that's it, bamboozle him with his own techno babble..
Now that's the best suggestion yet.
You can also get the assembly department to define their preferences and
whatever assembly want is usually enough to make it a law written in
stone :-)
For Signal traces you might what to use the argument that more copper
will give him more resistance and actually will cause more impedance to
the rise time on his circuit. This may cause him to rethink his
request. Sometimes if you talk their language you can get your point
across without having to use other drastic measures. ;-)
Joe J. - C.I.D.
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