I have a situation where the engineer has placed via holes  within SMD
pads, on a double sided PCBoard.
IPC-SM-782 (3.6.3.1 & 2)  discusses geometries used to channel or "neck
down" land areas going to a via to prevent solder migration.
 I am familiar with blind/ buried via technology (IPC-275 5.4.8.4) used for
multilayer printed circuits.  Can anyone give me information on
placing vias within smd pads and does it fall within a Class -2
specification?  Please send any info on Assembly processes used
to  prevent solder migration /insufficient solder fillets, and size
recommendations of the via/technology used. (IPC does not seem to
clearly state that vias cannot be placed within smd pads).
Thanks!

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