James --
When you posted this originally, I replied and ask if you would be willing
to share your calculator. I haven't heard anything so I am going to try
again. Will you please send me a copy of the web based calculator or its
url.
TIA
Jeffrey A. McGlaughlin, C.I.D.
Sr. PCB Designer
Battelle Memorial Institute
Columbus Ohio
[log in to unmask]
-----Original Message-----
From: James Jackson [mailto:[log in to unmask]]
Sent: Friday, March 02, 2001 8:40 AM
To: [log in to unmask]
Subject: Re: [DC] Board Density Factor
Hi guys,
It still can be boiled down to the basics that say that each and every
component
has a certain number of leads that take up a certain amount of space on a
board.
Once you determine those numbers, the rest is pretty much the same as the
old
EIC's method for figuring out the numbers.
I have kept track of many of the designs that I have done through the years,
and
have worked out a pretty usable set of formulae that I use in my work.
I even put all of it together into a web based calculator that I can access
from
anywhere that I have Internet access. (I used to have to fill in a sheet of
paper and use a calculator.)
There has been much published on this, also - and right now, I don't have
the
references in front of me, but a web search should get you a few hits on the
topic.
Regards,
James Jackson
Oztronics
> Using DIPS in the old days was fine for EIC's and area calculations.
> But with SMD being predominant you must consider fan-out, or fan-in.
> Using fan-out as worst case you can typically add 30% to the area of an
> soic type part or 100% to a chip cap (if both pins have vias).
>
> Also, for DIP's we typically used only one side of the board. Now both
> are common practice. But you still have to add some fudge factor for
> fan-out/fan-in.
>
> Let's NOT get into a discussion of blind or micro-vias. It would hurt ;).
>
>
> Regards,
>
> Jerry Schwartz, CID
> IPC Certified Interconnect Designer
> "May the Schwartz be with you"
>
> Jerry Schwartz, CID Designer 3
> Harris Corporation GCSD Voice (321)-727-5474
> P.O. Box 37, MS 1/9843 Fax (321)-729-5990
> Melbourne, FL 32902-0037 Pager (321)-690-9797
> mailto:[log in to unmask]
> http://harris.com
>
>
> -----Original Message-----
> From: Brooks,Bill [mailto:[log in to unmask]]
> Sent: Friday, March 02, 2001 1:15 PM
> To: [log in to unmask]
> Subject: Re: [DC] Board Density Factor
>
>
> Hi Jeffrey,
>
> This is an interesting topic... I remember using the 'density factor' back
> when it actually meant something. When the 14 and 16 pin DIP was the
> predominant package size used on most PCBs we did calculate 'equiv. IC's
per
> square inch' as a measure of design density. The way you would do that is
> see how many parts, (i.e. resistors, caps, diodes, etc..) would fit into
the
> same area as a 14 pin dip. This would give you an equiv. IC value for your
> discretes. Then you divided the number of 'virtual' or equiv. IC's you had
> and divided them into the square in. of the board surface. This would give
> you a value to compare between designs to give you an idea of how
difficult
> the board would be to lay out. Today... I think you could do the same with
> 0805, 1206, sot, sioc, etc. and come up with an equiv. value and it would
> correlate with the old density factor fairly well.
> Of course, we can push the envelope more now because of improvements in
> processes in manufacturing... but anyway, that's how we used to use the
> density factor calculation when I was doing hand tape and Mylar.. in the
> early 70's and 80's.
>
> Bill Brooks
> PCB Design Engineer
> DATRON WORLD COMMUNICATIONS INC.
> 3030 Enterprise Court
> Vista, CA 92083
> Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
> mailto:[log in to unmask]
> IPC Designers Council, San Diego Chapter
> http://www.ipc.org/SanDiego/
> http://home.fda.net/bbrooks/pca/pca.htm
>
>
>
> -----Original Message-----
> From: McGlaughlin, Jeffrey A [mailto:[log in to unmask]]
> Sent: Friday, March 02, 2001 9:44 AM
> To: [log in to unmask]
> Subject: [DC] Board Density Factor
>
>
> I was recently ask to explain the board density factor calculated by our
> layout package. It gave a factor of 0.1 sq. in./14-pin DIP. I translated
> that to be 140 pins per square inch so that it made more sense in the two
> sided surface mount arena, but was left wondering if there was a better
way
> of figuring board density. What are you using and why?
>
>
> Jeffrey A. McGlaughlin, C.I.D.
> Sr. PCB Designer
> Battelle Memorial Institute
> Columbus Ohio
> [log in to unmask]
>
>
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