Tom, 

This type of failure mode (open vias after reflow) is more than likely a
result of excessively high CTE in the Z-Axis. The fact that the assembly
does not show signs of delamination is not an indicator that the
material would pass IST and electrical testing after exposure to higher
lead-free reflow profiles. Really depends on the profile your vendor is
using and if your vendor is holding their processes tightly (could be
over stressing your laminate at the assembly house). The data I have on
this material shows thermal stress as 10 seconds @ 288 degrees C
minimum. It also shows the CTE in the Z-Axis as 3.2% - 3.5% from 50 to
260 degrees C. You should also know the results for Time@260 degrees C
and/or Time@288 degrees C in minutes. If at all possible, you should
also have the Td (Degradation Temp) results. Some laminate datasheets
have all of the required information and some do not but a call to the
manufacture can go a long way when trying to characterize laminates
based on IPC test methods. The vendor may even suggest a replacement
material based on feedback from their user base. We have run into
several situations during lead-free testing where a laminate manufacture
has re-formulated or actually withdrawn / replaced a specific laminate
due to improper characterization on the datasheet. 

Just based on the cursory review of the laminate datasheet I would
suspect the EM-320 laminate might be suitable for lead-free processing.
You may want to check to be sure your vendor is not using the EM-320(5)
laminate as the CTE Z-Axis expansion is higher and might cause issues
with plated through hole reliability. This material is also listed as
lead-free compatible but I would not use it just based on the CTE
numbers. If you continue to have problems and your assembly house can
prove their profiles are appropriate (I would suggest they use thermal
couples in specific locations to verify this) then you may need to go
with the EM-827 Laminate which has a slightly lower CTE in the Z-Axis.
However this seems over-kill based on your board thickness.

Thanks
Tony Cosentino
Tekelec
919-460-3656
[log in to unmask]


-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Tom
Parkinson
Sent: Tuesday, June 05, 2007 10:14 AM
To: [log in to unmask]
Subject: [DC] Via Open

Tech Net & Designer Net

Greetings. We are running into a situation on Lead Free processed PCBs.
Failure mode is finding open vias during unit testing (fully populated).

Boards are Tg170, Material type EM320, 0.063" thick boards.  
6 layers of 1 oz copper. ENIG 3~5u"

Suspect vias go from top layer to bottom layer only.

After running through reflow, we have found vias open. No visual signs
of delamination, however when ohming out the via, if we press on the via
we get continuity - thus we suspect the vias are opening during the
process.

Anyone out there having these problems, or information concerning this
failure mode?  Z-expansion failure?


Tom Parkinson
Quality System Manager - CIT
WinTronics, Inc.
Phone: 724-981-5770 - extension 235

------------------------------------------------------------------------
---------
DesignerCouncil Mail List provided as a free service by IPC using
LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with
following text in the BODY (NOT the subject field): SIGNOFF
DesignerCouncil.
To temporarily stop/(restart) delivery of DesignerCouncil send: SET
DesignerCouncil NOMAIL/(MAIL) Search previous postings at: www.ipc.org >
On-Line Resources & Databases > E-mail Archives Please visit IPC web
site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100
ext.2815
------------------------------------------------------------------------
---------

---------------------------------------------------------------------------------
DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF DesignerCouncil.
To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL)
Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
---------------------------------------------------------------------------------