DESIGNERCOUNCIL Archives

December 1997

DesignerCouncil@IPC.ORG

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Subject:
From:
"Joe Felts Jr." <[log in to unmask]>
Reply To:
DesignerCouncil Mail Forum.
Date:
Fri, 19 Dec 1997 16:58:36 -0700
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What parameters trigger a designer to specify "high-speed" (low Dk & Df)
products such as Getek, Arlon 25N, Rogers RO4000 and Neltec N4000-13  -
 i.e., that market segment between FR4 and Teflon?

I've read that circuit miniaturization generally requires high (not low)
dielectric constants;  does this mean that these materials will not be
needed in the emerging micro-via arena?  What about flip-chip, DCA, etc.?
I've also heard that these materials have been unable to penetrate the
cellular market due to severe cost constraints and that FR4 has been "good
enough".  Will FR4 eventually be inadequate?

As a PWB engineer, I spent many hours qualifying these materials for my
shop but rarely saw an actual application.
From a PWB fabricator's perspective, what do designs using these materials
generally look like?
- Large backplane size or small 'hand-held device' size?
- High-layer thin core (12+L, .005" and lower) designs or conventional 4, 6
& 8-layer builds?
- Homogeneity and symmetry or unbalanced designs (split planes, heavy
copper, heat sinks)
- thin copper (half or 1 oz.) or thick (2+)?
- PCMCIA or not?

Curious about future trends,
Joe Felts

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