There is alot of helpful information about BGA's in the attached file
(Power Point).  Hope it helps.

-----Original Message-----
Sent: Tuesday, August 20, 2002 12:18 PM
To: [log in to unmask]
Subject: Re: [DC] 104 pin BGA


It took a while for me to find this but here is a good method for
determining break-out layers

<<Insert Message body>>


An equation for the estimating the number of layers to route a BGA:

# of layers = ( (n/2)-((G-Db-s)/(L+s))+1 / ((G-Dv-s)/(L+s))+1 ) + 1

where

L = line width
Dv = via pad size
G = I/O pitch
s = line spacing
Db = contact pad size
n = # of I/O

I saw this equation in a technical report, it is originally attributed
to
Dr. C. Chao at HP Laboratory.  I
know somebody who has validated with some of their boards.  I'll be
interested in finding out how it works
with yours.

Ron Giachetti
Department of Industrial & Systems Engineering
Florida International University
Miami, FL 33174
[log in to unmask]

<<<End Insert>>>

Jeffrey A. McGlaughlin CID
Sr. Designer
Battelle Memorial Institute
Columbus Ohio
[log in to unmask]



-----Original Message-----
From: Matthew Lamkin [mailto:[log in to unmask]]
Sent: Tuesday, August 20, 2002 11:34 AM
To: [log in to unmask]
Subject: Re: [DC] 104 pin BGA


Be careful, if you manage to do that they will be asking for the whole
board
on only 2 layers....

If its a 6 layer board then why only breakout on 2??



> -----Original Message-----
> From: Mark Mainland [SMTP:[log in to unmask]]
> Sent: Tuesday, August 20, 2002 2:26 PM
> To:   [log in to unmask]
> Subject:      [DC] 104 pin BGA
>
> Hello,
> Is it possible to break out on only 2 layers with a 104pin BGA? Its
going
> on a 6 layer and the customer only wants traces on top and 1 internal
> layer!
>
> Thanks,
> Mark
>
>
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