Never (almost) split your GND. Always keep it solid. Any split will
create noise even in what you may "think" is not a high speed design. The
signal switching of all the IC's these days are so fast, they react as though
they are "high speed" signals in your design.
Go ahead and split up power all you want, BUT don't use that layer for
return paths. Again, you'll get noise. I like putting power "puddles" on
routing layers that are not very dense. This accomplishes two goals:
1- Helps to decrease layers
2- Fills the gaps on low copper layers. (No copper thieving needed.)
Keep the plane clearance at 8-10mils to keep down added capacitance AND
give the fabricator more accuracy for trace etching. Watch out for via
"slots" in these and make sure the added copper paths can carry the necessary
current from point to point.
Good luck!
Cherie Litson, IPC-CID+/CMIT
Litson1 Consulting
PCB Design Solutions & Training
206-619-8844 [log in to unmask]
In a message dated 2/22/2016 12:40:11 A.M. Pacific Standard Time,
[log in to unmask] writes:
I wouldn't be surprised if the manufacturer advises to use laser.
When I used to also be involved in PCB manufacture (I must say quite a few
years ago) even the 0.30mm dill bit used to break often, which was the
smallest at the time, and the stack heights of the PCBs had to be reduced,
therefore increasing costs.
Food for thought....even though this was at least 17 years ago....God I'm
getting old. :)
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Ron
Olinyk
Sent: venerd́ 19 febbraio 2016 20:26
To: [log in to unmask]
Subject: Re: [DC] Mechanical drill -6mil aspect ratio
Thanks all for the insight!
I think it makes the most sense now to use laser drilling on this design.
I was trying to avoid that to save cost, but it looks like it might be
more costly overall using a thru-drill (breakout, drill breakage, ect).
Thanks Cherie for the L1-L3 suggestion -I think this will free up area on
the L2 layer for more routing -despite some added cost.
My only quandary now is whether to place power fanout on L2 (signal
layer) or split up the L3 (Gnd layer) with power copper. This design is
not super high speed (CPU, which is the only 0.5mm BGA, only runs at
24MHz)....Any advice?
Thanks
Ron
On 19/02/2016 2:49 AM, [log in to unmask] wrote:
> Hi Ron,
>
> A 6 mil drill in a 62 mil board is possible. What you'll find is your
> available fabricators list will get a little smaller and the cost will
> get higher. It will depend on the quantity you want to produce. If
> you're mass producing these, then you may run into some issues. If
> you're making less than 6,000 per year, you'll be ok finding
fabricators.
>
> Not only do the drills wander, but they break. This causes "fallout"
> in production and the cost of scrap& tooling gets added to your
> order. You may want to look at dual blind laser drilling: L1 to L2
> and L1 to L3 (same from the bottom) with no blind vias can open up
> connectivity and keep costs down. Especially when L2& Ln-1 are GND
> layers. Keeps other signal paths clear using through vias and allows
> breakout on L3& Ln-2. It will be a cost trade-off negotiation.
>
> I agree with Jeff, talk with your fabricators and find out what will
> work best for them. Most likely they will want a 4-5 mil annular ring
> on the through via. However, you can make a 12 mil pad on a 6 mil
> laser drill
> (L1-L3) and a 10 mil pad on a 4 mil laser drill (L1-L2).
>
> Also, there are noise canceling benefits to having GND only 2-3 mils
> from the outer layers. This gives you more ammo for the "cost
> trade-off" of laser drilling.
>
> Good luck!
> Cherie Litson, IPC-CID+/CMIT
> Litson1 Consulting
> PCB Design Solutions& Training
> 206-619-8844 [log in to unmask]
>
>
> In a message dated 2/18/2016 3:58:43 P.M. Pacific Standard Time,
> [log in to unmask] writes:
>
> Does anyone know what the typical aspect ratio would be for a 6mil
> (0.152mm) drill in FR4 would be?
> Can a 6mil drill be used as a full drill-thru on 0.062 thick circuit
> board? -which I think would be a 10:1 aspect ratio...
>
> I've got a design with a 0.5mm uBGA (169 pin, full array) that i want
> to do fanout vias between pads. I'm using a 8.7mil BGA pad and
> planning on a fanout via with a 12mil pad and 6mil drill. I
> originally set this up as a blind via from top to inner1 layer, which
> works, but I am quickly running out of available via room around the
> BGA for connecting signals, power/gnd, ect. I'm using an 8mil drill
> elsewhere on the board which I know is doable on a 0.062 board -just
> not sure if 6mil is doable -and with a 3mil annular ring!
>
> Any advice greatly appreciated.
> Thanks
> Ron
>
>
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