Bill,

It appears pretty obvious that you have a controlled impedence board that
probably has a few 50 ohm transmission lines running around to "where the RF
components reside" (to use your own words).

The odd thing is that if it truely is "an IF Demodulator", it probably is a
low enough frequency so as not to require any 50 ohm lines. I.e.: Typical IF
Modulators are in the 10.7 Mhz or lower range, with the matching impedences
up in the 1K range (or in other words, out of the range where you are
dealing with transmission lines).

The real question is: Are you sure there are no components requiring 50 ohm
transmission lines.

While there may actually not be any "RF" components requiring a controlled
impedence 50 ohm transmission line, don't forget that some logic familes
require 50 ohm transmission lines also, such as ECL,  PCL, and others.

It may just be that your "old design" did at one time have some other
circuits incorporated which did require 50 ohm lines, which have since been
removed, or one other explanation might be that this board was co-produced
with a counterpart board (Possibly the RF front end (which possibly would
require some 50 ohm lines)?) on the same panel, and you are only looking at
this design which can be reproduced on it's own without the controlled
impedence requirements.

Run this all by your EE, and double check that you do not have any ECL or
other circuitry like that on the board.

One other thing is that you may have some input or output signal that is
infact a 50 ohm line that just needs proper termination on your board. To
investigate this, just look at all of your inputs and see if any of them
have a 50 ohm terminating resistor near the any of the inputs to any of the
IC's. If so, this could mean that you have an input that is a controlled
impedence transmission line (probably about 68-70 mils wide) (althhough it
could be internally terminated and hence no 50 ohm resistor). As far as
outputs are concerned, you would have to check the datasheets on any outputs
that go off the board.

Barring that, it would seem safe to "balance" the design, although you will
probably have to add some "ground plane fill" on layer 3 (the internal
signal layer) if you really want it "balanced".

JaMi Smith

* * * * *


----- Original Message -----
From: "Brooks,Bill" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, June 24, 2002 3:31 PM
Subject: [DC] Board Layer Stack up Guidelines


> Hi folks,
> I have a older proto board (an IF Demodulator) that was defined with an
> asymmetrical stack up and I am concerned about the cost issues with
leaving
> it alone... Since we are changing the board at this time, I thought to
check
> for any issues with the design package and found this anomaly...
>
> It looks like this:
> .063 overall thick FR4 material
>
>      0.070 max     ________________________ Top Layer Signal
> .032 separation--->________________________ GND Plane
>                    ________________________ Internal Signal
>    0.00            ________________________ Bottom layer Signal
>
> The odd part being, the forced separation between the ground plane and the
> top signal layer where the RF components reside, primarily. Have you had
any
> experience with this sort of thing? Is there a good reference I can refer
to
> that deals with Board stack up issues?
> Do you think the board is at risk for flatness problems?
> The EE assures me that he knows of no known issues with the electrical
> properties of the circuit that would require a stack up of that sort. He
> says the only reason he can think of was parasitics and/or shielding.
> Like to hear your thoughts....
>
> - Bill Brooks
>
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