I believe I know the part you are discussing, it is a oval slot under the part. The tolerance for a slot is typically +/-5 mils. That's probably why
they cut the copper back, not realizing the necessity for the proximity. They should have talked to you regarding any changes to the artwork.
What has happened to me in the past is that they contacted someone that is not intimate with the design, and they made the wrong choice.
Unfortunately this causes problems, but it is best to work with your vendors to create an understanding of your desire to be involved in any changes
that occur with the design in manufacturing. I can see from your message, that you are a little more than upset. But keep in mind, it's best not
to be accusatory, and to work with your vendors to see why the problem occurred and what you can do together to keep this from happening again.
Karl
> Date: Tue, 18 Dec 2012 17:44:23 -0800
> From: [log in to unmask]
> Subject: Re: [DC] Micro-modification fab drawing note
> To: [log in to unmask]
>
> Greg, Tom,
>
> What you both said is true. However, this was a specific micro-modification that I probably need to explain better.
>
> This board has reverse-mount LEDs which require internal slots for the lens to pass through. By design, the pads for this component are relatively close to the edge of the routed slots, but still well within Class 2 fabrication allowance. The CM had the fabricator shave the heels of the pads to get them further away from the edge of the slot. Then they complained they didn't have enough copper to solder properly.
>
> The photographs accompanying the complaints clearly show the solder mask standoff per my source Gerbers, as well as their shaving of the heels. They didn't cover their tracks very well! From the evidence, my guess is they were trying to get off cheap on router bit wear by increasing the slop in the slots.
>
> What's even more weird is that the recommended soldering pattern on datasheet for this device calls for a square hole, and copper pads tangent to the edges of the square - neither of which is real in the world of PCB manufacturing. I lay odds not many customers would want to pay for a set of square die punches, and neither customer nor fabricator would want exposed copper breaking out into an edge, but thus reads the datasheet.
>
> These are pre-production runs, and the CM had plenty of time, measured in days, to evaluate this job in CAM. Certainly there will be a dialog about why they micro-modified only this footprint, and we will be getting to the bottom of it. At any rate they are responsible for the scrap on this rev.
>
> I understand and am in agreement with the general reasons why shops adjust Gerbers for process compensation, removal of board outline, clipping of silkscreen ink, even teardropping, but not this specific situation. Thanks for the suggested wording of the modified note - it certainly seems to deliver the message without absolutes - and for your advice on why this may have happened.
>
> Gary
>
>
>
>
> >________________________________
> > From: Greg Smith <[log in to unmask]>
> >To: [log in to unmask]
> >Sent: Tuesday, December 18, 2012 8:15 PM
> >Subject: Re: [DC] Micro-modification fab drawing note
> >
> >I have to agree with Tom: All shops will modify the Gerbers to work with
> >their processes.
> >If they didn't the finished pcb features would not match the Gerbers you
> >submitted.
> >If you need to add a note it should be something along the lines that no
> >modifications are allowed except for process compensation.
> >The note you suggest would likely result in your getting a call from the
> >shop on every job.
> >
> >I think the actual problem you have to solve is why did the shop modify
> >the artwork and then complain about it?
> >Make sure that is what really happened and that all parties have a
> >common understanding. There would seem to be a communication breakdown
> >somewhere.
> >
> >Greg Smith
> >
> >
> >On 12/18/2012 4:33 PM, Tom Hausherr wrote:
> >> Gary,
> >>
> >> Typically fabrication shops swell all outer layer features to compensate for
> >> their etch process tolerance. This has been going on since the beginning of
> >> PCB fabrication.
> >>
> >> I've never heard the board house performing micro-modification, but my guess
> >> is that might be possible to gain space between conductive etch. A space is
> >> more difficult to manufacturer than a trace or pad. i.e.: if the space is
> >> tight to begin with and then the fabrication shop swells the features for
> >> etch compensation this makes the space between features tighter. So they can
> >> swell and then micro-modify.
> >>
> >> I'm just guessing here because I don't have all the facts, but PCB designs
> >> often go through the CAM process on the 2nd or 3rd shift. The more notes you
> >> have regarding "Not permitted without prior approval" will surely postpone
> >> delivery if fabrication can't contact you at midnight.
> >>
> >> I don't know of any IPC standard that addresses this issue. However, I'm not
> >> sure if a fabrication CAM operator will be familiar with the term
> >> "Micro-modififications" and they might just throw all modifications into
> >> that category. So it's best to discuss the terminology with your fabricator
> >> to eliminate any misinterpretations.
> >>
> >> Tom
> >>
> >>
> >> -----Original Message-----
> >> From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Gary
> >> Koven
> >> Sent: Tuesday, December 18, 2012 4:06 PM
> >> To: [log in to unmask]
> >> Subject: [DC] Micro-modification fab drawing note
> >>
> >> We just had a case of a CM taking it upon themselves to micro-modify
> >> footprints on source Gerber's and then complain to us about the yield,
> >> blaming the areas which they micro-modified.
> >>
> >> This has motivated us to consider adding a micro-modification note to our
> >> boilerplate drill drawing layer. This is my first cut at such a note:
> >>
> >>
> >> "MICRO-MODIFICATIONS OR ANY OTHER CHANGES TO CONDUCTIVE FEATURE PATTERN ON
> >> SOURCE GERBERS ARE NOT
> >> PERMITTED WITHOUT PRIOR APPROVAL OF (COMPANY NAME)".
> >>
> >> There isn't much to go by on this topic in any of the IPC specs or on the
> >> Web. Please correct me if there's an IPC spec out there that addresses this
> >> issue.
> >>
> >>
> >> Anyone else who has experienced this, and can improve upon this wording,
> >> please share.
> >>
> >>
> >>
> >> TIA and Best Regards,
> >>
> >> Gary M. Koven, C.I.D.
> >> InVue Security Products
> >>
> >> Charlotte, NC, USA
> >> Board Of Directors, RTP Chapter
> >>
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