DESIGNERCOUNCIL Archives

1996

DesignerCouncil@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Doug Brooks <[log in to unmask]>
Date:
Mon, 08 Apr 1996 08:43:57 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (48 lines)
Last week I posted the following question .....

"I have several sources (including the Motorola FACT book) that say bypass
caps should be placed as close as possible to the GROUND pin of the IC (not
the power pin.) But I have seen few really specific discussions of why this
is so.
Some of my customers insist on having them placed as close as possible to
the power pin.
Can anyone give me a definitive explanation of where they should be placed,
and why?"

I have seen some responses that don't seem to address the issue directly, so
let me give the answer that I THINK is correct. Then if anyone knows whether
it is correct or not they can expand on it.

Given, the bypass cap supplies charge at the immediate time of switching.
There is some trace or lead impedance (inductance) between the plus or minus
side of the cap and the power or ground pin of the IC. This impedance should
be minimized ... hence the use of short, wide traces (to the best extent
possible.)

NEVERTHELESS, since the cap (normally) is smaller than the distance between
the power and ground pins of the IC, one trace (either between the plus side
of the cap and the power pin of the IC, or between the ground side of the
cap and the ground pin of the IC) will be longer than the other one ---
unless you consciously place the cap exactly between the pins, thereby
making the impedance of both traces equal. SO THE QUESTION IS --- which
trace do you make shorter? And a lot of references say the ground trace is
the one, and therefore the cap should be placed closest to the ground pin. 

Now my question is WHY? I think the answer is that the signal lines from the
IC are referenced to ground. Therefore, noise on ground will directly appear
on the signal lines, reducing noise margins. The signals are not, however,
referenced to Vcc, and therefore the system is less susceptible to noise on
the power pin than it is to noise on the ground pin. Therefore, the design
rule is to minimize the trace impedance as much as possible, and if a
compromise is necessary, favor the ground side (where the signals are
referenced to.)

Now, I'm looking for someone to confirm this, or challenge it. Or point us
all to a definitive reference where this topic is specifically addressed.

Thanks for listening

Doug Brooks



ATOM RSS1 RSS2