Fred Pescitelli wrote:
> Has anybody been using SMT Plus land patterns? They are advertising a lib.
> for P-Cad. How do they compare to the IPC 782 Patterns?
> Jim Blankenhorn (of SMT PLUS) once wrote an article commenting on the
IPC-SM-782 document. It was common sense type notes concerning several of
the footprint dimensions in 782 that were questionable. I'm sure he would send
you a copy if you call him. Personally, I have never heard a complaint about
anything in the SMT Plus library, and I tend to trust someone who gives
solutions based on 1000's of real-world assemblies rather than the ones decided
"by committee"
> What are you doing as far as via's and conductors under SMD components? I
> noticed the P-Cad lib has keepouts under the chip components. I have been
> routing traces under SMD and have not had any problems.
> It has been quite awhile since I've even SEEN a PCAD library part (we make our
own) and am kinda surprised about built-in keepouts. Several recent articles
mention having to customize glue dispensing over traces in high volume
assemblies so it might be good to speak to the assembler about it. But look at
other boards; almost every design you see has traces under chip devices! From
my experience vias are okay if they are tented, otherwise the inability to
clean properly may cause early failure (from corrosion).
> Silk Screen legend sizes seem to be very large on most commercial lib's
> compared to what I have been using. I seem to get away with .008 width and
> sometimes down to .060 height. What is your experience?
> For the last three companies I've worked at, 60high/8wide was typical, and
50high for tight placements. One consideration about the width is that 8 looks
crisp, very legible, but for higher volume the screen can get clogged, which
will start leaving gaps.
> I have just finished a Design for a client that demanded that all components
> be orientated in the same direction and also all of them lined up, nice and
> neat. Great idea if I would have had twice the board area to work with. I
> know the desireability of this but I also like to think form follows
> function. Many of the original reasons for doing this are obsolete. The
> board is finished now but I just know placing the parts for optimal routing
> would have resulted in much shorter runs, and a more functional layout. What
> is your opinion? How are you doing it?
>Tough question, because I sometimes can't help going for beauty if I have the
time, the artist in me I guess... but not if the circuit is degraded.
I think you might benefit from asking more questions up front just to
understand the issues your customer/company is considering. Maybe they want
your board to grace the cover of their new brochure, eh?
> I also was prohibited from putting chip caps on the solder side, even though
> I routinely do it with other designs. Are any of you designing boards that
> are waved with chip caps on the solder side?
>Sometimes what would benefit you as a designer could cost the company a lot in
the long run. Even if you only want to put a few components on the back, it
complicates the assembly drawing and may affect training feild service manuals,
parts may not be accessible after installation, Assemblers typically charge
more automatically for double-sided boards and more steps are required,
depending on the volume it might not be worth programming a pick-and-place
machine for only a few parts on the backside which means those will have to be
hand assembled; there are any number of reasons for making design decisions.
Again, you may want to start asking more questions...
good luck
Jack
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