Carlos,

Your problem is the "clock" and not getting the material early.   The
clock on the PCB designer should not start before the design has gone
through a review but that doesn't mean you should not be working on it. 

The designer can solve many issues by looking at the design while EE is
open to modifications (pre-review).   Getting a schematic early means
you have the time to make sure you don't have contradictory rules,
critical HS nets and parts can be placed to assist the EE in simulation,
test routes can be run on the board to evaluate problem areas that may
be corrected by a simple trade off of parts or different pinout for an
FPGA.

Concurrent design allows the designer to improve the layout by working
with the EE when there is still trade-off capability in the logic
design.

The sooner a potential problem is identified the easiest it is to
change.  Once the design has gone through review, the EE will not want
to make a change because now any modifications shows up as a documented
item as opposed to a simple design trade-off.

Work with your management to change the start time on the layout clock
instead of refusing to start working on the layout prior to a review.

------------------------------
Karen McConnell
Senior Member Engineering Staff - Electronics / PWB
Lockheed Martin - Engineering Process Improvement Center
http://www.lockheedmartin.com/
 


-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of
carlos mossin
Sent: Wednesday, September 26, 2007 8:04 PM
To: [log in to unmask]
Subject: Re: [DC] Conversation topic: Getting your designs done right!

Hi Bill:

This is my number one all time pet peeve.
  A project goes to PCB layout before the schematic is  100% complete.
Or has even been to a design review.  Management thinks that the PCB
designer can at least get started on the project and work concurrently
with the the
Design Eng.   What ends up happenning is 20-30 netlists revisions later,
I
may have all the info and a complete netlist imported.
Unfortunately for the PCB designer, the meter started running the moment
the first netlist was produced.  the endless cycle of "Churn" as I call
it creates an environment where the PCB designer does not want to
actually go forward with the netlist at hand since he/she is aware its
going to change at anytime.  This then leaves the PCB designer with
typically 3-4 days left in his alotted time scheduled to finish the
entire design.  Most often the design eng. does not want to fess up to
management that they made changes to the design and have eaten up 2
weeks of the 3 weeks that where alloted for the PCB layout.
 I have since required that during the input review meeting, management
show that the schematic has been reviewed and is ready to go. Of course
last minute changes are inevitable. This has earned me the label of
"Hardass"

Anybody have a better sollution?

carlos CID


On 9/26/07, Brooks,Bill <[log in to unmask]> wrote:
>
> OLE_LINK1I have been talking with another designer I know and the 
> topic was..."What type of issues do you encounter in your day to day 
> job that seem to 'get in the way' and prevent your getting your work 
> done correctly or  at least with a minimum amount of undue effort? "
>
> Personally my issues have been mostly with accurate communications...
> getting good information properly transferred to me with all the 
> necessary details to build a part or schematic symbol, or a mechanical

> constraint or part...  details...details...  the 'devil' always lives
in the details...
> :-) Seems I am always having to ask about something... what about this

> feature? How much current does this part draw? How much heat needs to 
> be dissipated? Are there optional ways this can me solved... etc..
etc..
>
> What are your 'pet peeves' or frustrating issues with getting your 
> designs done right?
> What gets in your way?
> What would make your work easier?
> What would you like to add or eliminate from the process?
> What needs adjusting?
> What would fix the problems?
>
> I'm curious to hear other's opinions and thoughts...
>
> Best regards,
>
> Bill Brooks, CID+
>
>
>
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