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December 2006

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Subject:
From:
"Brooks,Bill" <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Mon, 11 Dec 2006 09:57:24 -0800
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Well, not to presume what the formers of the spec were indicating, but I
would venture a guess as to the intent at least, that they wanted us to
document parameters of the design that were critical to its electrical
performance so as to communicate that information to the others that needed
that information in order to determine the cleanliness requirements, or
testing requirements, and also keep from having these design features
compromised in any revisions and/or changes in the future.

In the IPC-D-325 they basically give you 3 levels of documentation to choose
from, 'practically none', 'some more', and a 'whole lot' of documentation as
best determined by the end user requirements. My guess is this level of
circuit electrical performance description would be needed in the case where
you expect SIR cleanliness measurements to meet a specific breakdown voltage
or perhaps the description of impedance matched differential lines or some
other electrical requirements would find its way onto the master drawing...
obviously indicating some action or requirement on the part of the board
supplier.( an explanation of 'SIR' is available at
http://www.empf.org/empfasis/feb04/sirtesting.htm )

That's my take on it, but I don't have the inside scoop on why it was put
there, just reasoning on it and attempting to explain why I think it's
included.

Who knows, maybe the author(s) are reading this and can shed some light on
the subject...

Best regards,

Bill Brooks
PCB Design Engineer, C.I.D.+
Tel: (760)597-1500 Fax: (760)597-1510
Datron World Communications, Inc.
Vista, California


-----Original Message-----
From: Donald Kyle [mailto:[log in to unmask]]
Sent: Monday, December 11, 2006 8:54 AM
To: [log in to unmask]
Subject: [DC] IPC-D-325A question

Hi all, I have an IPC-D-325A question.

In table 4-2 'Typical Master Drawing Detail Requirements' under
characteristics 'G Design Concepts' requirement 1 reads:

         Maximum rated voltage (maximum voltage between two
non-connected adjacent conductors with the greatest potential difference).

When would this requirement be needed on a Master Drawing?

         For electrical net testing?
         For dielectric thickness requirement?

If it were intended to inform the board shop at what voltage to do
the net test why not just say TEST NET LIST USING 40V or 250V.

If it were intended to specify the need for a minimum dielectric
thickness between layers again why not just say 5000V BETWEEN LAYERS 1 AND
2.

Any other ideas?




Donald Kyle C.I.D.+
281-285-7528 voice
281-285-8593 fax
[log in to unmask]
Schlumberger
Sugar Land Product Center (SPC)
Mail Drop MD155-1
155 Industrial Boulevard
Sugar Land, Texas 77478


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