Thanks...
Most of us seem to want a 'common sense' approach that helps with the producibility of the bare board and the ease of assembly...
Many of the design discussions I see center mostly on the 'cutting edge' techniques...
HDI and copper filled vias was a topic at one IPC chapter meeting for example...
While we all need to know those things too, I still see people struggling with expensive boards that really did not need to be that expensive.
Just by choosing the right size hole and pad diameter early on in the design, you can cut a large part of the difficulty out of the manufacturing processes...
:)
William Brooks, CID+
Senior MTS (Contract)
2747 Loker Ave West
Carlsbad, CA 92010-6603
760-930-7212
Fax: 760.918.8332
Mobile: 760.216.0170
E-mail: [log in to unmask]
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Pete
Sent: Thursday, September 11, 2014 6:22 AM
To: [log in to unmask]
Subject: Re: [DC] Vias
A very good discussion, Bill. I anticipate a lot of good thought from designers with varying experiences!
Filled vias. As BGAs get tighter, QFNs suck solder off pads, placements get tighter - there are lots of reasons to start filling vias. And once you've started, filled vias make better thermal vias. Pretty good for decoupling and RF, too. By careful design of inner/outer layer pads, you can reduce breakout problems by filling the via. It makes ICT easier.
Filled vias aren't some magic bullet to save designs. They do add cost and process steps. But, if you find a need add the process steps to fill a via, you might as well fill 'em all, and take advantage of filled vias.
Speaking of QFNs: if you aren't going to fill the vias, place them in an array that allows a windowed paste pattern that is not on top of the vias. The paste is the panes, the vias are the muntins. You will reduce the amount of solder that flows into the holes, since the paste has to flow on the surface to reach the holes. Placement pressure is less critical, as it will not squeeze solder into the vias.
Pete Houwen, CID
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