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February 2007

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Thu, 15 Feb 2007 22:47:49 +0530
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Snowfall was late this year.. may be my reply too..but you could find this more useful in understanding tomb stoning.

Cheers!!!
Raj.

----- Original Message ----
From: "Hillman, Clare" <[log in to unmask]>
To: [log in to unmask]
Sent: Friday, 2 February, 2007 4:37:31 AM
Subject: [DC] 0402 tomb stoning

We are currently in discussion with our production board assembler about
0402 components, in particular pad sizes and connecting traces.  They
have identified that our pad sizes and trace routings could potentially
cause an uneven thermal distribution between the pads resulting in the
component tombstoning.

 

We're in the process of modifying our 0402 footprint so that it meets
current IPC standards but the board assembler is also recommending that
we change the size of traces that connect to the pads.

 

e.g. one pad is connected, using an 8 thou trace, to an IC pin.  The
other pad is thermally relieved to a large ground shape using 2x20 thou
traces.  The recommendation is that we reduce the 20 thou traces to 8
thou.

 

Any advice would be gratefully appreciated.

 

Regards

Clare Hillman, C.I.D.

 


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