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Subject:	Re: BGA footprint and escaping guildelines
From:	"[Jeffrey] [Jenkins]" <[log in to unmask]>
Reply To:	(Designers Council Forum)
Date:	Wed, 3 Dec 2008 09:24:32 -0800
Content-Type:	text/plain
Parts/Attachments:	text/plain (42 lines)

I second this book as a good reference. I have been using similar breakout styles in a class 3 design environment for about 14yrs

Most vendor datasheets give you information on the pcb footprint, but are generally lacking on BGA breakouts of (FPGAs Espcially!!) other than required critera (sometimes).

________________________________________

JEFFREY A. JENKINS, CID+
SR. PCB/CAD Designer, RF Design 
L-3 COMMUNICATIONS - 
LINKABIT DIVSION
3033 Science Park Rd.
San Diego, CA 92121
Tel:  (858) 552-9832
Fax:  (858) 552-9487
[log in to unmask]

________________________________________
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Heidel, Jeff
Sent: Wednesday, December 03, 2008 9:07 AM
To: [log in to unmask]
Subject: Re: [DC] BGA footprint and escaping guildelines

Have you looked at the book by Charles Pfeil from Mentor Graphics?  I have an earlier version it looks pretty good.  You can buy it on Amazon for $23.35 (http://www.amazon.com/BGA-Breakouts-routing-Effective-Methods/dp/1438255233/ref=sr_1_2?ie=UTF8&s=books&qid=1222708001&sr=8-2 )


________________________________________
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Charles Gervasi
Sent: Wednesday, December 03, 2008 10:56 AM
To: [log in to unmask]
Subject: [DC] BGA footprint and escaping guildelines

Does anyone know a good reference book or standard that provides guidelines for footprint and escaping of fine pitch BGAs?  

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