Excellent idea!  Did not know such a technique was possible but it
makes a lot of sense.

Bob


----- Original Message -----
From: Phil Dutton <[log in to unmask]>
To: <[log in to unmask]>
Sent: December 21, 1999 7:21 PM
Subject: Re: [DC] Plating limitations


: I would have to agree that a better way would be to use busbars on
the back
: of your motherboard.
: If it is a 'euro' DIN style motherboard you can get busbar strips
that
: press fit over the wire-wrap style pins of your mating connectors.
: Just some ideas, you may have already considered.
:
: Phil.
:
: At 07:58 21/12/99 -0700, you wrote:
: >Happy Holidays,
: >I am working on a backplane design that requires the ability to
handle up to
: >50Amps. This brings to mind alot of questions.
: >
: >To handle that kind of current I need a trace with a width no less
than .82"
: >with 2oz material, or  .55" with 3oz material, with a 20 degree C
: >temperature rise.
: >
: >1) What are the ramifications of using 2 or 3oz copper current
carrying
: >external layers and 1 oz for internal signal layers ie warping,
cost,
: >manufacturability, hole plating issues.
: >
: >2) If I use the 2 external layers as planes with 1 or 1.5oz copper,
I can
: >double the heat disipation area (roughly) and half the current load
per
: >layer, but then I am concerned about current carrying capacity thru
the
: >plated holes. What is a minimum number of holes if there were 10
pins
: >available at a diameter of .035 to carry the current ( 5 Amps per
pin)?
: >
: >Thanks for your feedback
: >
:
: Phil Dutton C.I.D.
: Senior CAD Technician
: IPC Certified Interconnect Designer
: Vision Abell Pty Ltd
: Second Avenue, Technology Park,
: Mawson Lakes.  SOUTH AUSTRALIA  5095
: ===============================================================
: Phone :         (08) 8300 4400 (reception)
: Fax :           (08) 8349 7420
: email:          [log in to unmask]
: Internet Page:  http://www.vsl.com.au
: ===============================================================
: