Hi everyone,

We have a module board that will be mounted to a carrier board by bottom-termination array. The minimum standoff gap between boards is 50um. We have exposed copper on the bottom side of the module, and traces (solder mask covered) on the top side of the carrier, directly below the exposed copper. Per our internal design rules "solder mask should not be relied upon as an electrical insulator."

Considering the 50um gap between exposed copper and solder mask-covered copper, do you think we have a concern? This is very low voltage application.

Thanks in advance for any thoughts or advice.
Todd


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Todd MacFadden
Component Reliability Engineer

BOSE CORPORATION
Design Assurance Engineering
Tel: 508.766.6259


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