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December 2001

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Subject:	High-Speed PCB Design
From:	Tamir Ben Shoshan <[log in to unmask]>
Reply To:	(Designers Council Forum)
Date:	Thu, 27 Dec 2001 09:30:38 +0200
Content-Type:	text/plain
Parts/Attachments:	text/plain (36 lines)

Hello,
My company is planning to design a board with the following parameters (estimation)
- 22-32 layers with control impedance requirements.
- blind/buried via.
- Frequency of 3.125GHz.
- 10” Traces length
I would appreciate any help with the following questions:
1. What should be the trace width, thickness and space for that frequency to meet the single ended 50 ohms impedance or differential pair 100ohms.
2. How does the via effect the impedance and is there any calculation for knowing that influence
3. What are the raw materials used for that kind of design.
4. Does the Rogers family raw materials can be used for that purpose, does it has all the thickness range of core and prepreg, what should be the traces properties and can it be used for the .
5. What are the design rules for using more then one raw materials type at one stack up?
6. Are there any limitation/design rules for using the blind/buried via(annular ring, minimum drilled hole, maximum number of press cycle, maximum layer connection…) .
7. What is the coating methodology used for the blind/buried via at Sanmina.
Thanks In Advance,

Tamir Ben-Shoshan
Charlotte's Web Networks
Operation Department
Phone: 972-4-9592203 ext. 321
Fax: 972-4-9597138
Mobile: +972-54-893025
Email: [log in to unmask]
Ha'mada St. 2 , P.O. Box 333, Yokneam 20692, ISRAEL

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