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November 2007

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Subject:
From:
Jack Olson <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Thu, 29 Nov 2007 10:28:12 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (169 lines)
Yes, its interesting to me how even after so many years of experience,
something will happen to make me dig deeper, and then question how much I
really know about a subject.

In this case, I was surprised about the "z-axis" sentence in paragraph
6.3so I also tried to dig a little deeper.
I wondered if maybe the newer draft of IPC-2221B would word it differently.

and, guess what?

The newest draft DOES make a change here...!

Here is the proposed text:


*6.3 Electrical Clearance *Spacing between conductors on individual layers
should be maximized whenever

possible. The minimum spacing between conductors, between conductive
patterns, and between conductive

materials (such as conductive markings or mounting hardware) and conductors
*shall *be in accordance with

Table 6-1, and defined on the master drawing.

For Z-axis spacing considerations, use the dielectric breakdown of the
specific material. The dielectric

breakdown as published in IPC-4101 is based on 0.5 mm thick laminate and may
not be suitable for thin

cores. It is recommended that lower profile copper foils be used when thin
core laminates are required;

such laminates are susceptible to violating minimum dielectric thicknesses
between the copper tooth

structure. This enables tighter control of the dielectric thickness.
*

NOTE: *The designer should be aware that the profile roughness of the copper
foil determines the minimum

dielectric distance between opposing copper *points* within a thin core
laminate. See also IPC-4101 for

tolerances by class and thickness of core; IPC-4562 for surface roughness of
copper foil types; and IPC-

6012 for the method to determine minimum *dielectric* thickness. Designers
should be careful not to use

*minimum* dielectric spacing values to determine overall printed board
thickness.
-=-=-=-

Maybe I "lucked out" by questioning something that is coincidentally being
addressed by the committee.

I still don't understand specifying the strength only for laminates that are
.5mm or greater on the slash sheets. Our boards commonly have more than 4
layers, so we would rarely use that value I guess.

There's always more to learn, eh?

thanks for writing back

Jack


.
On 11/29/07, McGlaughlin, Jeffrey A <[log in to unmask]> wrote:
>
> Jack -
>
> Your question got me to thinking, so I did a little research.  Way, way
> back in time when the Mil specs were king we used MIL-STD-275E as the
> guide for design. In it was a much simpler table for the spacing of
> conductors with only 8 possible classes. This table was for edge to edge
> spacing only, z-axis spacing was fixed to 3.5mil [89um] minimum. This
> language was carried in to the IPC-D-275 specification, however with the
> advent of IPC-2221 it changed to include z-axis spacing - I for one
> missed this change until now. I have always used the dielectric
> withstanding numbers from the slash sheet/material data sheet de-rated
> by 1/3-2/3 to determine z axis spacing and have only once in twenty
> years experienced a z-axis punch through short. This short, by the way,
> was as a result of exceeding the rated voltage output by an order of
> magnitude not as a result of the design.
>
> Have I been doing it wrong for so many years?
>
> Jeffrey McGlaughlin, CID
> Engineering Designer
> Battelle
> 505 King Avenue
> Columbus Ohio 43201-2693
> (614)424-7582 Phone
> (614)458-7582 Fax
>
> -----Original Message-----
> From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Jack
> Olson
> Sent: Tuesday, November 27, 2007 6:19 PM
> To: [log in to unmask]
> Subject: Re: [DC] How to Read a Slash Sheet
>
> Well, no one ventured a guess on how to read line 5 of a slash
> sheet, so maybe I will try to ask the question a different way....
>
> What good is it to list a certain amount of dielectric strength on a
> slash sheet, if paragraph 6.3 of IPC-2221A specifies that we use
> Table 6-1 for determining z-axis clearance?
>
> For example, if I need to design for 260V, and Table 6-1 specifies
> an 8mil (.2mm) laminate thickness, that's what I need to use,
> right? So the fact that someone says a material strength is xx
> kilovolts is a moot point once I have been constrained to 8mils
> for 260V.
>
> In my memory no one has ever discussed this subject on any IPC
> listserver, which makes me wonder if I'm asking a valid question.
> Am I mixing terms here?
> Jack
>
>
> On 11/14/07, Jack Olson <[log in to unmask]> wrote:
> >
> > Can someone please help me interpret slash sheets of IPC-4101?
> >
> > We are having some board problems, so I went to look up the voltage
> > breakdown (line 5 in the laminate section)
> > It lists 40kV for laminates over .5mm, thick, but nothing is listed in
> the
> > column for laminates less than .5mm
> > (Our design has .1mm laminate)
> >
> > What does that 40kV mean, and why is it only given for thicker
> laminates?
> >
>
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