understood, I use "Viasystems" on a regular basis... Thanks for the input...
Regard's, Frederick Dark Jr.
Manager Senior PCB Designer
Crestron Electronics, Inc.
22 Link Drive Rockleigh N.J. 07647
P:201.750.7004 ext.11320
F:210.767.5772
[log in to unmask]
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Anderson, Veronika
Sent: Thursday, April 24, 2014 5:55 PM
To: [log in to unmask]
Subject: Re: [DC] IC's with a "ground slug" with vias...
Vias shall be either closed or opened from both sides.
Opened via will lead to a solder joint starvation and requires a manual post reflow operation to fill vias with solder from secondary side. This will eliminate the solder peaks as well.
This is suitable for low volume production only.
In mass production you better use via-in-pad technology - vias shall be filled with nonconductive epoxy, planaraized, and plated with copper over the filled via.
The best option is - to have via plated though with solid copper. However, this technology available from Via System (former DDi / Anaheim, CA) only
Veronika Anderson C.I.D | Sr. Electrical/Mechanical Design Engineer | Excelitas Technologies
Office: +1 626.967.9521 x 236
1330 East Cypress Street, Covina, CA 91724 USA
[log in to unmask]
www.excelitas.com
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Greg Smith
Sent: Thursday, April 24, 2014 2:34 PM
To: [log in to unmask]
Subject: Re: [DC] IC's with a "ground slug" with vias...
I went through this a few years ago. We had a pcb with voltage control ICs that used the center slug as a ground and heat sink. These were quad no lead parts. I originally left the vias open with a "partial tent" on the back side: the mask left a small annular ring of exposed plating around the hole, with no mask on the component side. Solder flowed into the holes and left a small bump on the back side. It seemed to work fine. However, in production, our off-shore assembly house requested a change. They felt the vias were starving the pad of solder on the component side and, for some reason, did not like the look of the solder protruding on the far side. They requested that the vias be "capped" on the far side. The cap is a second application of a more viscous mask that will close the hole opening. It requires another CAD artwork layer to define it. After much debate, fearing trapped air would "volcano" at worst, or create solder voids under the slug, we agreed to do it. The assembly shop did a test run with no issues on their side. As far as I know it worked but since this was a production run, in limited quantities, with customer demand, I was not able to get a sample to
(destructively) test. We were not driving the ICs very hard so I don't know how thermal performance was affected.
As this type of chip was becoming more popular I found a real lack of support by the manufacturers. There were fairly nebulous instructions for footprints and a lot of different ideas on what worked. In fact, at one time, Texas Instruments had out two white papers on the subject that came to exactly opposite conclusions. I don't if that has changed any in the last 2 years.
On 4/24/2014 1:25 PM, Jack Olson wrote:
> If you tent the back side you will have a risk of little volcanoes
> underneath the part during soldering.
>
> The document you are thinking of is IPC-4671 (Design Guide for
> Protection of Printed Board Via Structures)
>
>
> On Thu, Apr 24, 2014 at 2:58 PM, Fred Dark <[log in to unmask]> wrote:
>
>> Hello all - we have been adding a solder-mask dot on the same side as
>> the IC's with a "GND-SLUG"... no issue... however if a "SLUG" has a
>> large quantity of vias due to the requirement to dissipate heat here
>> is where I have a issue... not enough area for paste and proper
>> solder percentage to the area... so in this case I was suggesting to
>> tent the opposite side that the IC resides on... filling, capping and
>> planarized is the way to go, however would tenting the opposite side
>> be a issue..? note via hole size is 10mils... anyone aware of the IPC standard and or requirement..?
>>
>> Regard's, Frederick Dark Jr.
>> Manager Senior PCB Designer
>> Crestron Electronics, Inc.
>> 22 Link Drive Rockleigh N.J. 07647
>> P:201.750.7004 ext.11320
>> F:210.767.5772
>> [log in to unmask]
>>
>>
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