Meeting of the Silicon Valley Chapter of the IPC Designers Council


Date: Thursday April 27th, 2017

Time: 11:30 am - 1:30 pm

Where: Sonesta Silicon Valley Hotel

              (formerly known as the Beverly Heritage)

Sponsor: Sanmina Corporation


Topic: Solutions for Effective Soldermask and Via Fill

Speaker: Brian Nelson      Manager, New Product Introduction Engineering     Sanmina Corporation


What was once a simple matter of just specifying its color, soldermask has evolved along with via fill into a measurable consideration of performance, cost, and practicality that often constrains design attributes on surface layers. Innocuous terms like flood, tent, plug, and fill are attributed to different applications of mask and so to differing design constraints and differing end results. Which is right and best for your design may not be clear. There are also considerations of liquid photo imageable (LPI) vs. Laser Defined Imaging (LDI) soldermask and even processing and electrical consequences to simple citings like color selection. Keepouts and performance limits are critical to know so the right supporting feature padstack designs are deployed. Also, the politics and prohibitions of mask-defined features are not well-known and so not acknowledged in a host of PCB designs. As proximities decline the need for soldermask defined features can become more prevalent. But, what this type design enables, process concerns can just as easily take away.


Via fill also has its limits and design constraints, not just in terms of hole diameters but on even more subtle but critical constraints. A percentage of board designs either never get built or must undergo measurable design changes to make them buildable because of assumptions made about via fill that cannot be executed in process.


The intention of this session is to impart a fuller picture as to how these materials fit into design decision making to better assure the CAD effort translates into a buildable, affordable, repeatable product format at its first release.



Mark your calendar for Thursday, April 27th from 11:30am to 1:30pm for this educational “Lunch ‘n Learn”


Location: Sonesta Silicon Valley Hotel

                 (Formally known as the Beverly Heritage)

                 1820 Barber Lane

                  Milpitas, CA 95035


Agenda:

Lunch served 11:30 - 11:45

Misc. Business 11:45 - 11:55

Sponsor's Spotlight 11:55-12:10

Presentation 12:10 - 1:00

Q & A discussion 1:00 - 1:15

Wrap-Up 1:15 - 1:30


Please RSVP no later than noon on Monday, April 24th

Sponsored by Sanmina Corporation


You must Sign Up using the EventBrite link: April Meeting!<https://www.eventbrite.com/e/april-2017-meeting-silicon-valley-chapter-ipc-designers-council-tickets-33189337201>

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