Correction not Mylar ... Kapton is what I was thinking... just came out as
Mylar... (I hate when that happens)... :9(
- Bill Brooks
-----Original Message-----
From: Brooks,Bill [mailto:[log in to unmask]]
Sent: Monday, March 04, 2002 11:13 AM
To: [log in to unmask]
Subject: Re: [DC] Dielectric Disconnect
Hi guys,
Since I have had to design a lot of boards with voltage spacing being an
issue for approval from UL, CSA, VDE, TUV, CE and the lot.... I have a 'rule
of thumb' number I use for break over voltage between thicknesses of
fiberglass/epoxy laminates (z axis) which is 700 volts per mil.
Now I went to locate a reference for you on the web and here is a data sheet
for one manufacturer that makes PCB material and you can look at their spec
... They say it's 750V/mil for their material.
http://www.electroply.com/tech/gfngfp125ut.htm
All of the data I have seen for voltage spacing on the surface includes some
allowance for the presence of contaminants on the surface of the board...
Unless the board is conformal coated... with an approved material, i.e.
"protected from dirt". Soldermask is good for "protection from dirt", but
may not be relied upon for "insulation". In Transformers they use Mylar for
its high insulation resistance and require 2 layers of insulation on primary
to secondary circuits... Most Power supply manufactures are very concerned
with these specifications for voltage spacing for protection of the end user
to avoid shock hazard and fire hazard. Most of them get UL and CE approval
before shipping their products to market. Most of the designs I did had to
pass a "HIPOT" or High voltage potential test where we applied 6KV to the
circuits and they would have to not arc at any point in order to pass. And
we used standard FR4 material in most cases... sometimes we used CEM1.
I hope that info is helpful in your design... Check with the safety agencies
for specs... :)
IPC uses the values that were originally approved in the MIL-STD-275 spec we
all used to use for our designs in the past ... That will not guarantee
passing any specific safety agencies requirements.... You need to review
their requirements above and beyond what IPC specifies...
Bill Brooks
PCB Design Engineer , C.I.D.
TITAN SYSTEMS CORPORATION
DATRON WORLD COMMUNICATIONS DIVISION
3030 Enterprise Court
Vista, CA 92083
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
mailto:[log in to unmask]
IPC Designers Council, San Diego Chapter
<http://www.ipc.org/SanDiego/>
<http://home.fda.net/bbrooks/pca/pca.htm
http://dc.ipc.org/
-----Original Message-----
From: Bundrant, Anthony [mailto:[log in to unmask]]
Sent: Friday, March 01, 2002 9:03 AM
To: [log in to unmask]
Subject: [DC] Dielectric Disconnect
IPC-2221, paragraph 6.3 Electrical Clearance, states: "The minimum spacing
between conductors, between conductive patterns, layer to layer conductive
spaces (z=axis), and between conductive materials (such as conductive
markings or mounting hardware) and conductors shall be in accordance with
Table 6-1, ... ."
We have a thermal plane which will see 600 volts worst case. According to
Table 6-1, we would need roughly 20 mils of dielectric between this plane
and a routing or electrical plane layer. Why? The electrical strength of
polyimide from IPC-4101/42 is 29000 volts/mm (736 volts/mil). Has anyone
had experience with this apparent disconnect between specs?
TIA,
Anthony Bundrant
Bell Helicopter Textron
Technical Resource Specialist - Electronic Packaging
817.280.8903
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