I agree...
-----Original Message-----
From: Chris Ball [mailto:[log in to unmask]]
Sent: Monday, April 04, 2005 2:40 PM
To: [log in to unmask]
Subject: Re: [DC] Soldermaks and ATE\ICT
Hi Fred-
For what it's worth...
As near as I can tell, a "plugged via" is full of non-conductive stuff, by
definition, and is not the same as a "tented via", which as I understand,
is a via with no opening in the soldermask...
Per your note, I'd expect plugged via's every time.
If soldermask artwork supplied has the TP vias open, with the rest closed,
I'd think the boardshop would call for clarification before proceeding to
do anything... but I guess that doesn't help now.
Are you saying the boardshops in the past left the TP via's open? Or that
you were somehow able to probe them successfully despite the fact that they
were plugged?
Throughout our company we have a mix of via / testpoint philosophies (which
is a lot like not having a philosophy). On vias, separate pads, open vias,
tented vias.... but if a via is a TP, it better not have any mask on it or
in it.
Best Regards,
-Chris
Fred Dark
<[log in to unmask]> To: [log in to unmask]
Sent by: DesignerCouncil cc:
<[log in to unmask]> Subject: [DC] Soldermaks and ATE\ICT
04/04/2005 01:48 PM
Please respond to
"(Designers Council
Forum)"; Please respond to
Fred Dark
Hello All, I recently has a problem with one of our venders... We received
some boards that had ATE\ICT testpoints using vias... However the vias had
soldermask in the barrel of the vias and the ATE\ICT test probe did not
make contact... We have had the below note on our drawing for years and
never had this problem, only with this specific vender... Would the note
below be appropriate, or should there be more to it... I would appreciate
the input...
Regard's, Fred Dark Jr.
4. SOLDER MASK: USE SMOBC PROCESS (SOLDER MASK OVER BARE COPPER). SOLDER
MASK TO BE LPI (LIQUID PHOTO IMAGEABLE), WITH VIA HOLES PLUGGED, APPLIED TO
BOTH SIDES PER THE APPROPRIATE ARTWORK LAYER. SOLDER MASK REGISTRATION
SHALL BE +/- .005
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