Bob and others,

Planes do act as caps....
especially at frequencies where the normal decoupling caps already behave
like inductors. There's no way to do proper power supply decoupling above
let's say 200MHz
with traditional caps. Lower the distance between power and ground. I know,
lot fo people are using caps in the picofarad range for very high speed
decoupling. With a distance between power and ground of about 100um you can
save all this caps. You still need low and medium frequency decoupling caps
in the uF and nF range.

A final trick is to mix the base material between power and ground with
some kind of ferrite. The ferrite will not come apparent at low
frequnecies, but at higher frequencies the losses in the ferrite rise
dramatically and destroy all of the RF energy. Great method, but it isn't
cheap. BTW, you always need resistance to remove energy. I.e. it's the ESR
of the decoupling caps that makes EMI disappear. So using NPO caps is no
good for decoupling. Z5U is just bad enough.

Decoupling is a science (and probably religion) of it's own.

regards,



Peter Marek



Peter Marek
MarekMicro GmbH
General Director
Phone + 49 - 9661 - 908-210
Fax + 49 - 9661 - 908-100
E-Mail [log in to unmask]


-----Ursprungliche Nachricht-----
Von:    Bob Landman [SMTP:[log in to unmask]]
Gesendet am:    Freitag, 23. Juli 1999 02:50
An:     [log in to unmask]
Betreff:        Re: [DC] Stackup assignment for pcb boards.

Jack,

Brooks wrote recently about planes acting as caps - they do not.  If you do
the
math you will see why.  0.1uF takes a LOT of parallel copper separated by
that
much glass-epoxy (distance reduced the capacitance).  In a 0.1uF the
separation
is the oxide layer on the aluminum foil.

Much as we don't like them, every single power pin MUST be bypassed by
0.1uF
caps - if a large chip like a BGA or PLCC has say 4 power pins - bypass
them ALL
or pay the piper.  Bypass is a misnomer - what they mostly do is stiffen
the
power rail and act as small local power sources until the power supply
inches
away can replace the charge in the caps.

Bob Landman
H&L
----- Original Message -----
From: Jack Olson <[log in to unmask]>
To: <[log in to unmask]>
Sent: July 22, 1999 4:51 PM
Subject: Re: [DC] Stackup assignment for pcb boards.


>From my experience:

1)      If a designer can get away with using ? ounce copper he should,
because it is easier to etch and control trace widths. The only reason to
use thicker copper on internal layers would be so that the same trace width
can handle more current. Internal traces need way more copper to handle the
same thermal rise than external traces, but if current isn't an issue I
don't think there is a reason for one ounce.
2)      A small dielectric thickness between power and ground will increase
capacitance, so in effect the planes coupled together act as one big cap.
Maybe some decoupling caps can be removed?
3)      I only specify material thicknesses for impedance controlled
boards.
For example, we do lots of 100 ohm differential pairs that need 5mil or
6mil
cores, but the rest we don't exactly care about. Don't constrain the vendor
without a reason, in my opinion.

Jack

                -----Original Message-----
                From:   Eileen Ong [R&D]
[mailto:[log in to unmask]]
                Sent:   Wednesday, July 21, 1999 1:57 AM
                Subject:        Stackup assignment for pcb boards.

                I have seen different specification given to pcb house for
pcb fabrication.
                What is the guidelines regarding
                the thickness of copper for different layers for best
performance and cost
                effective.

                1) For example for a 2/4 layer pcb,examples of some of the
spec. are :
                   2 layer pcb : a) FR4 material with 1/2 oz copper
                                  b) FR4 material with 1oz copper

                   4 layer pcb : c) FR4 material with 1oz copper in all
layers
                                  d) 1/2oz copper clad FR4 plate up 1oz,
inner layer use 1oz

                Any differences between a) & b)  or c) & d) ?

                2) I have read from "somewhere" that it is better to use
smallest distance
                spacing between power & ground plane
                in the inner layer for lowest power impedance. What is this
smallest
                distance ?

                3) How about core and prepreg, do you'll usually specify
their thickness
                also ?

                Thanks in advance for all contributions given.

                Best Regards,
                EILEEN ONG (R&D Dept.)
                Paradise Innovations (Asia) Pte Ltd
                Email : mailto:[log in to unmask]
                Web: http://www.paradisemmp.com