We're designing a board with LEDs that require filled and capped thermal vias.  This requirement is supposed to reduce the board thermal resistance. The LED datasheet refers to IPC-4761 for the process, but we don't have that spec in house.

The thermal vias will only be used in the LED land patterns.  The interconnect vias will be standard open PTH.

Is there a simple method for inspecting that the filling and capping has been done properly?  Can a test structure be designed, say two or three vias filled but not capped?

We don't want to have to destroy boards to inspect this, neither do we wish to require a Certificate of Compliance from the supplier.

Thanks and Best Regards,

Gary M. Koven, C.I.D.
Dynazign, Inc.
Charlotte, NC, USA
Veteran of the Marsh School

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