I agree that this matrice will work in most instances and generally the
engineer will make notation, if it is to be otherwise.

Henry R. Linneweh
PCB Designer




On Fri, 5 Apr 1996, Waddell, Pete wrote:

> 
> I've heard it said both ways. But what is the deal? Well since decoupling caps 
> are intended to minimize switching noise, which shows up at the pwr pin, what 
> we're trying to do is dump the noise to gnd. This means minimizing noise on 
> traces, so vcc trace(s) should be as short as possible. I've seen the Moto book 
> too and it confuses the hell out of a lot of people. Does the Moto fact book say
> why the caps should be closer to gnd??
> 
> Theoretically the multi layer construction would seem to mean that since there 
> are no traces, (a surface mount cap does require a trace/via, however short, to 
> feed to the plane) the caps are filtering noise all across the board. Does this 
> make sense?
> 
> Pete Waddell
> 
> ______________________________ Reply Separator _________________________________
> Subject: Re: Placement of bypass caps
> Author:  [log in to unmask] at Internet
> Date:    4/5/96 4:18 AM
> 
> 
>      Mr Brooks
>          The old rule of tumb was to set by-passes next to VCC so you did 
>      not have a pwr trace running on top of your board the length of your 
>      IC.
>         How ever today most boards have planes for pwr, gnd So a even 
>      matrics of bypasses across the board will do the trick.
>      
>      All you are doing is decoupling vcc,gnd, if done correctly the board 
>      and parts will not make noise.
>      
>      
>      
>                            Hope this helps
>                            DM PAVONE
>                            Micros
>      
>      
> ______________________________ Reply Separator _________________________________
> Subject: Placement of bypass caps
> Author:  [log in to unmask] at SMTPLINK-Micros 
> Date:    4/4/96 5:45 PM
>      
>      
> I have several sources (including the Motorola FACT book) that say bypass 
> caps should be placed as close as possible to the GROUND pin of the IC (not 
> the power pin.) But I have seen few really specific discussions of why this 
> is so.
>      
> Some of my customers insist on having them placed as close as possible to 
> the power pin.
>      
> Can anyone give me a definitive explanation of where they should be placed, 
> and why?  Thanks
>      
> Doug Brooks
>      
>      
>      
>