Ron,
In general, I agree with your findings, as long as all conductors in/out
of the lands of a given chip device are relatively the same. When one
has a gross mismatch between conductor widths on each of the
terminations (lands) the reflow performance may be affected resulting in
unwanted movement of the component. Also keep in mind the size of the
termination and device you are soldering to. Some components require
greater heat profiles than others. Adding land thieving to the
combination can be looking for trouble in as that some lands or
components may not solder properly.
I agree that modern processing profiles have been able to overcome many
of these anomalies. However, the designer stills needs to be aware of
these possibilities and practice preventative and cautious design. Trade
offs are inevitable, as long as we are aware of what we are trading off.
Regards,
Gary Ferrari
Ferrari Technical Services
860-350-9300
Scott, Ron wrote:
> Gary,
>
> While the book may refer to possible heat thieving, in practical
> application it has no effect. Pick up any number of commercial PCBs and
> you can easily see that this IPC standard is not used. As an engineer
> that happens to do PCB layout, I want my traces to be as robust as
> possible. I typically use 10 mil traces which happen to be about as wide
> as a given pad in my application. When necking down unnecessarily you
> can produce manufacturing problems near the pad. If heat thieving is a
> problem, I'd bet we have a process problem. The key word in the IPC spec
> is the "possibility" of heat thieving. IPC specs are published as a
> guide, not a law. Mo' metal, mo' better.
>
> Cheers,
>
> Ron Scott C.I.D.
> Sr. PCB Designer
> Texas Instruments
> Storage Products Group
> Tel: 214.567.4715
> Cell: 972.816.7978
> Fax: 972.761.5070
> [log in to unmask]
>
>
>
>
> -----Original Message-----
> From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Gary
> M. Koven
> Sent: Wednesday, July 27, 2005 14:06
> To: [log in to unmask]
> Subject: Re: [DC] Trace width ratio to pad
>
> Allen,
>
> Chapter and verse would be IPC-2221, Sec 10.2.2 "Lands for Surface
> Mounting", from which I quote the salient sentence:
>
> "The possibility of heat thieving is reduced by "necking down" the
> conductor near the soldering area."
>
> That oughta do it.
>
>
> Best Regards,
>
> ----------------------------
> Gary M. Koven, C.I.D.
> Engineering Services Manager
> Dynazign, Inc.
> 806 Tyvola Road, Suite 100
> Charlotte, NC 28217
> P: 704.405.1234 x210
> F: 704.405.1402
> http://www.dynazign.com/
>
>
>
>
> -----Original Message-----
> From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of
> Allen T.
> Maddox
> Sent: Wednesday, July 27, 2005 2:47 PM
> To: [log in to unmask]
> Subject: [DC] Trace width ratio to pad
>
> Hey Folks,
>
> I was always told to NOT exit a pad, especially a SMT pad, with a trace
> the same width of the pad for the reason of dissipating the heat off the
> pad and creating soldering issues.
> I have an engineer who doesn't believe me and wants proof. Does anyone
> have any articles that support what I've been taught, or have I been
> mislead all these years?
>
> Thanks,
>
>
> Allen Maddox C.I.D.
> Sr. PC Board Designer
> GAI-Tronics, Corp
> 610-796-5854
> PO Box 1060
> Reading, PA 19607-1060
>
> [log in to unmask]
> www.gai-tronics.com
>
>
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