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February 2004

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Subject:
From:
"Jack C. Olson" <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Fri, 6 Feb 2004 08:53:56 -0600
Content-Type:
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Andy Kowalewski's 5x rule would be EXTREMELY safe.
The problem is, most layout people don't have such luxurious
amounts of space to waste.

Visualize your cross section of a trace over a reference
plane, or between two reference planes.
Now imagine putting copper 1x away from it on each side.
Can you see that the cross section is starting to resemble a coax?
A center conductor surrounded by copper?
You want the field (the flux lines) to snap to the reference
plane, and not to the copper on the side, unless you are
using  field solver to calculate the impedance of a
"coax-like" structure.
In order to remove the copper at the sides from the equation,
you have to move them far enough away as to be negligible.
2x would probably be far enough away to make only the
slightest difference in the impedance calculation, but
I was asked to use 3x.
Of COURSE 5x would be nearly ideal, but who has the
space for it?
You want ideal? Route one trace per board! <grin>

If you find any science on it, share it with us, ok?

best wishes,
Jack





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  |  Subject:      Re: [DC] copper pour stand-off                                                                                |
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Caterpillar: Confidential Green                 Retain Until: 03/06/2004
                                                Retention Category:  G90 -
                                                General
                                                Matters/Administration




Ray,

I really can't see trace width having a lot of bearing here. You are
dealing with an EM field that is terminating at the reference plane. The
relationship to height above this plane is the important thing. The fact
that the trace impedance is related to both width and height means that
it's credible to use trace width as a basis for this, but height is the
real player.
I've usually worked with at least 2 x the height above the plane as a rule
of thumb in these instances. More is of course better..... That's why you
are getting various 'rules of thumb' from different people depending on
their own experiences. Andy Kowalewski's 5 x rule would be fairly safe. I
don't know if any of the field solver programs that are available can give
you some better information, but may be worth looking into.
IPC-D-317 is the closest IPC spec I've found dealing with these sort of
problems, yet it doesn't seem to address your particular question.

regards,

Phil Dutton C.I.D.

-----Original Message-----
From: Ray Dwyer [mailto:[log in to unmask]]
Sent: Friday, 6 February 2004 9:09 AM
To: [log in to unmask]
Subject: Re: [DC] copper pour stand-off


Greetings DC,
Lets see, I got these suggestions; match trace width, in this case that
would be 10 mills, and three times trace width and 5 or 6 times trace
width.
The dielectric thickness on this would be about 7 mills so any of these
would be thicker than that.
What of you engineer types, what do you guys say?  And does IPC say
anything
about this?
In the past I have either matched trace width or for stronger signals
doubled trace width.  But either way I have never come across a clear study
of how to make a best judgment.

> -----Original Message-----
> From: Ray Dwyer
> Sent: Thursday, February 05, 2004 11:58 AM
> To:   [log in to unmask]
> Subject:      copper pour stand-off
>
>
> Greetings,
> I am concerned about rules for stand-off distance for copper pour on an
> outer layer to provide added isolation to a pair of sensitive low current
> traces.  There are other traces on the top layer as well.  The basic info
> is 50 ohm impedance, 10 mil wide microstrip, digital TTL signal current
as
> low as in 10s of mili-amps, FR-4 material, 1 oz copper.
> Ray Dwyer
> 972-371-4046
> Maxim
> 4401 Beltwood Parkway
> Dallas, Tx. 75244
>
>

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