Roger M. Stoops, C.I.D., PCB Designer
Matthias Mansfeld
<m.mansfeld@MANSFELD-ELEK To: [log in to unmask]
TRONIK.DE> cc:
Sent by: DesignerCouncil Subject: Re: [DC] More Tips wanted for my first multilayer board?
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03/12/01 07:08 PM
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On 12 Mar 01 at 12:51, Roger M. Stoops wrote:
> (Matthew Lamkin wrote)
> [...]
> I suppose that I could do that and then use the other 2 available
> layers for routing the signals. [Yup.] Why would the powerplane be a
> middle layer? if it has groundplaning/emc reduction effects wouldn't
> it be better nearer the outside? [Ground is typically more effective
> when used on the outer layers as an EMI shield. Has to do with
> common-mode rejection of noise and other such technical stuff. Also,
> power/ground planes are easier to use and create on inner layers,
> also make for smaller Gerber files.
... if done with negative planes, yes. But often it is easier to make
them with positive, poured copper, especially split planes - depends
of the CAD system..
> When power/ground planes are
> placed near one another (0.1-0.2mm), the design benefits from the
> resulting distributed capacitance, but this would not be a benefit
> for EMI reduction
Yes, it would! Better power/Ground decoupling = less switch noise on
pwr/gnd sy stem (think about ground/power bouncing with fast CMOS
circuits:-( ) = less radiated emission from cable shields etc.
==============
Oops! You're right. My brain went on vacation, left my body behind.
I should have known better, been to the abbreviated course by Rick Hartley.
Planes that are 0.006" apart give 150pF/sq-in., or 23pF/sq.cm if my
calculations
are right, minus the openings for signal vias to pass thru.
==============
> (8 layer designs work really well to get both
> benefits, but your management probably isn't ready for that yet...).
*sigh* many customers are not ready for that - they MUST fall on
their noses with 6 layers in EMI compliance test before they
understand this....
The EMI benefits from planes more towards the outer layers are
often not so big as you may assume - at least seen over the whole
system.
The shielding effect for signal layers between the planes has two
sides: You can keep a noisy signal or component away from other
"receiving antenna traces" on other layers with a plane between. BUT,
concerning EMI with anything in the outer world (CE legislation...)
it may be as bad as before or worse - The RF energy is
not radiated in all directions, it is just guided to the board edges
and then it finds the edges as sometimes perfect slot antennas (and
you have a mostly quiet system with an interesting antenna gain
diagram - high gain in two directions, CE limits exceeded about 10
or more dB)
==============
I solved that problem for the most part by putting ground or chassis
copper strips around periphery of the board on all layers, including
power layer(s), stitched through all layers to desired ground. Seemed
to help quite a bit.
Ref: Printed Circuit Board Design Techniques for EMC Compliance, by
Mark I. Montrose
==============
The same system with another layer stackup might have a perfect
omnidirectional aerial diagram with the same RF energy distributed
equally, no terrific "gain" in specific directions and the limits not
exceeded.
You can have real good EMI compliance only in two ways.
-Design the circuit to avoid the generation of unnecessary RF energy
(signal slopes only as fast as necessary, avoid known noisy ICs
if possible, good power/gnd decoupling)-
===============
This would be great, save for engineers who have to have the fastest
or most complex components. Me, the old 4000 series CMOS was wonderful, but
is too slow for 3.3VDC designs.
===============
- RF energy which cannot be avoided must be absorbed = converted to
heat in anything with ohmic behaviour, like speciall ferrites,
filters etc.
Pure metal shieldings etc. can only reflect the RF energy, it
will disturb anywhere else, but not disappear.
===============
We do this too: Ferrite cores around cables, common-mode chokes and
filters on signal and communications lines, shields connected to a
ground point typically other than analog or digital. Situation needs
more care since we don't have earth ground to use for our products,
and some have to work well at construction sites at busy airports.
===============
If all that stuff sounds very complicated - with 4 layers, you would
not have many chances to try different stackups - and much homework
must be done from the circuit designer, and if this is not done well,
it cannot be our job (and won't be successfull) to try to rescue an
ugly circuitry with a perfect layout.
===============
Amen, brother, amen. We use a micro-controller for a family of products.
It's as noisy as can be, lots of noise everywhere from clock harmonics to
rise/fall times, found most of the noise comes from the MCU die itself!
Tried several different layouts before I found one that worked decently.
And they didn't give me the option of 8 layers, until they put TWO of
those beasties on the same board. Board failed FCC test with 6 layers...
passed with 8 layers. Imagine that...
===============
Just my 2 Euro-cents
Regards
Matthias
-----------------------------------------------
Matthias Mansfeld Elektronik
* Printed Circuit Board Design and Assembly
Am Langhoelzl 11, D-85540 Haar, GERMANY
Phone: +49-89-4620 0937, Fax: +49-89-4620 0938
E-Mail: [log in to unmask]
Internet: http://www.mansfeld-elektronik.de
=================
I apologize for any confusion caused. And your input is worth a lot more
than a few cents. Thanks.
And I'll see if I can get my brain back from vacation. I think it's still
WAY out there...
Sincerely,
Roger M. Stoops, C.I.D., PCB Designer
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