Hi Bill-
As George said, Cadence handles it pretty well. Veribest did also, so I
imagine Expedition carried that over, unless Mentor already had something
better.
But as to what geometry, spacing from one another and from components of
different heights, with or without via, which side or clamshell... we vary
widely within the company, globally.
In fact, portions of our company using Cadence still do the manual
'place-as-components' thing.
We don't build our own fixtures anymore. Most of the folks we work with
seem to want ODB++ or some other CAM output. But they'll take dxf's and
gerbers in a pinch.
BR,
-Chris
"Brooks,Bill" <[log in to unmask]>
Sent by: DesignerCouncil <[log in to unmask]>
06/05/2007 08:15 PM
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"(Designers Council Forum)" <[log in to unmask]>; Please respond to
"Brooks,Bill" <[log in to unmask]>
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Subject
[DC] ICT, bed-of-nails and CAD tool support?
'In-Circuit Test' is a seldom discussed subject at the 'designer's round
table' here...
I'm curious how other designers are affected by test points and how they
deal with testability in their designs.
I have placed test points in schematics and treated them as 'components'
on
the board before...
What have you seen for test point support from the CAD vendors and is
there
an easy way to automate this?
Also those who have to test for a living... what is the process you use
and
are the outputs from these CAD tools any help?
Best regards,
Bill Brooks, CID+
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