DESIGNERCOUNCIL Archives

1996

DesignerCouncil@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Date:
Wed, 18 Sep 96 07:37:21 EST
Content-Type:
text/plain
Parts/Attachments:
text/plain (69 lines)
 Good day!
   My QC Manager (also my boss) has concerns of heat dissipation 
 to the plane if no thermal is used to connect SMT pads directly 
 to the plane.  This could lead to the cold or insufficient 
 solder joints on some power and gnd pins.  Has anybody had any 
 problems or done any studies for this condition?  What width 
 traces are you using leading from the pads to the vias?  How far 
 is your via from the pad?  Are you using any special precautions 
 to prevent heat dissipation to the plane?  Any information would 
 be appreciated.
   I would like to thank the IPC and all the participants of this 
 forum for there willing inputs and suggestions.  I have picked 
 up a great deal of information and ideas from your experiences 
 and situations.  Where else can we share ideas and get REAL life 
 experiences to aid in our day to day battles!
 
 Many Thanks!
  Brandon Luther
  Dataram Corp.
  (609) 799-0071 x310
  [log in to unmask] 


______________________________ Reply Separator _________________________________
Subject: Re: Design (fwd)
Author:  [log in to unmask] at Internet
Date:    9/17/96 2:16 PM


We have been using vias without thermal pads for some time now, and have 
had no problem at all.  To my knowledge our fab vendors did not even notice 
the difference.  
 
Due to our heavy use of smt, virtually all our boards are 100% or 99.99% 
surface mount, removing the thermal pad and connecting our vias directly to 
the plane improved the emi-esd characteristics of our boards.  It has been 
a good deal all around.
 
In addition to this, we have also reduced the size of our anti pads.  We 
were having problems with signal quality due largely to "impedance bumps" 
which would occur when a trace passed a pad with a large anti pad.  This 
was because as the trace would pass over the anti pad, it would suddenly 
not have a ground layer to associate to.  To cure this problem, we have
reduced our anti pads to a size where when traces pass by at minimum distance, 
there is adaquate coverage by the associated layer.
 
my two cents worth...
Ken Barrett
Cisco Systems
San Jose California
([log in to unmask])
 
**************************************************************************** 
* The mail list is provided as a service by IPC using SmartList v3.05      * 
**************************************************************************** 
* To unsubscribe from this list at any time, send a message to:            * 
* [log in to unmask] with <subject: unsubscribe> and no text. * 
****************************************************************************
 

****************************************************************************
* The mail list is provided as a service by IPC using SmartList v3.05      *
**************************************************************************** 
* To unsubscribe from this list at any time, send a message to:            *
* [log in to unmask] with <subject: unsubscribe> and no text. *
****************************************************************************



ATOM RSS1 RSS2