Dear Colleagues:
            
IPC Printed Circuits Expo is fast approaching, and we are excited
about a new task group that has formed to address design
considerations which will ensure plated-through via reliability.

The 6-10e, Plated-Through Via Reliability - Design task group is
scheduled to meet at Printed Circuits Expo, in San Jose, CA, on
Tuesday March 5, from 8:00am to NOON.
            
This task group is responsible for developing guidelines for
designing reliable small diameter plated through holes in PWBs.
These guidelines will be forwarded for inclusion into design
guides such as IPC-2221. Anyone with experimental data concerning
this topic is invited to attend and share the results with the
design community.
            
Sherman Banks, Trimble Navigation, is the chair for the new task
group. If you have any questions or would like to forward
information to this task group, please contact Sherman at
(408) 481-6047, or Lisa Williams at the IPC (847) 509-9700
extension 379.
            
Thank you, and we look forward to seeing you in San Jose.


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Lisa M. Williams
Technical Staff
IPC
2215 Sanders Road
Northbrook, IL 60062
phone: (847) 509-9700 x 379
fax:   (847) 509-9798
email: [log in to unmask]
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