Tom,

Thanks for the reply, but maybe I wasn't clear in my question.

Where is this documented in IPC documentation?

Also, is there an inspection for 'exposed copper'? I do not see that either, 
and our incoming inspection individual was not even aware of exposed copper 
until I mentioned it to him.

Regards,

James Jackson
Oztronics


Quoting "Hybiske, Tom" <[log in to unmask]>:

> We pull ours back 0.50mm (0.020") as standard procedure on all layers.
> 
> Tom Hybiske
> Bose Corporation
> 
> -----Original Message-----
> From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of James
> Jackson
> Sent: Monday, June 03, 2013 1:07 PM
> To: [log in to unmask]
> Subject: [DC] Exposed edge copper - internal planes
> 
> Is there an IPC callout for exposed edge copper?
> 
> I seem to remember it not being allowed, but cannot locate an actual
> statement in any of the IPC documentation.
> 
> What I am referring to is when you have a negative copper plane (or copper
> pour) on an internal layer that extends to the edge of the PCB. When it
> gets fabricated, there would be a small line of internal copper for each of
> the planes that extend to the edge of the PCB - which could be shorted
> together, if a metal object were brought into contact with the exposed
> copper.
> 
> Any thoughts?
> 
> Regards,
> 
> James Jackson
> Oztronics 
> 
> 
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