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March 2001

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Subject:
From:
"Roger M. Stoops" <[log in to unmask]>
Reply To:
DesignerCouncil E-Mail Forum.
Date:
Thu, 15 Mar 2001 14:59:32 -0500
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Dan,
The problem you are having stems from the use of wildcard net definitions
in the Design Technology itself.  Layout Editor will not allow the changing
of wildcard net attributes from Route Editor.  The net attributes that are
changed are probably specifically named nets, such as VCC, GND, TXD, for
example.
To resolve this problem (you may not like this one, I don't...), is create
a seperate line entry for each signal name in the Design Technology Editor.
You have up to 32,766 lines to use, not counting the wildcard (*) line
entry.
Maybe someone should ask Zuken to modify Layout Editor to automatically add
the special data locally to the pcb database, not modifying the default
data in the Design Technology...  it's worth a shot.
Hope this helps.  If it doesn't, let me know, or else you can freely make
opinions regarding my ancestry, or lack of it... ;->
Regards,
Roger M. Stoops, C.I.D., PCB Designer


Trimble
Engineering and Construction Division
5475 Kellenburger Rd.
Dayton, OH 45424-1099 USA
Ph: +01 937.233.8921 or +01 937.233.4574 ext 288
Fax: +01 937.233.7511






                    Daniel Marks
                    <[log in to unmask]        To:     [log in to unmask]
                    SYS.COM>               cc:
                    Sent by:               Subject:     [DC] Zuken Net Width Exceptions
                    DesignerCouncil
                    <DesignerCounci
                    [log in to unmask]>


                    03/14/01 03:42
                    PM
                    Please respond
                    to
                    "DesignerCounci
                    l E-Mail
                    Forum."; Please
                    respond to
                    Daniel Marks





Question RE; Zuken Technology file (Net Width Exeptions), Zuken Route
Editor, Zuken Layout Editor

The transfer of Net Width Exceptions seems consistantly unreliable when
transfering line width assignments for PCB impedance controlled layers.
Sometimes the Zuken Route Editor will absorb new net width data, usually it
will not.  Once the Route Editor captures the Net Width Exceptions data the
editor seems to function fine until a change is made in the net width area
in the Technology Editor and that new technology information is passed
through the Zuken Layout Editor.  Efforts to have this problem resolved
through Zuken has been unsatisfactory.  Does anyone have experience in
resolving this problem?  Thanx in advance...

Daniel Marks
Three-Five Systems, Inc
Tempe, AZ
[log in to unmask]

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