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September 2009

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Subject:
From:
"Johnson, Joseph" <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Tue, 29 Sep 2009 13:49:08 -0400
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Jeffrey,

	I don't have any real guidelines for you, but it really depends on what the pad is for?  A BGA, Leadless QFP, QFP or your normal everyday SMT device?

	Of course if it's just for your normal SMT device you can get away with a lot more change in this.  Keep in mind your stencil is .006" thick so a 0.002" dimple is not that big of a deal.  However, any deviation on a BGA is critical.

	Joe J. 

-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of [Jeffrey] [Jenkins]
Sent: Wednesday, September 23, 2009 12:31 PM
To: [log in to unmask]
Subject: [DC] Dimples in Via-in-Pad and

HI,

I'm hoping that somebody may be able to help shed some light on a couple of questions that I have.

In multiple designs I'm utilizing a Via-in-pad with a non-conductive via fill and a class 2 wrap plating.  What I have noticed is that the planarity of the finished pad can vary from vendor to vendor, some with no visible dimple in the pad while others with a dimple that appears to be about .002" in depth. Please note that I do spec out a material with a Tg>160C to help limit Z expansion.
 
	-My question is how deep can this dimple be for causing a problem during assembly?  
	-Is there an IPC spec that I can hold them too? I've checked the IPC-6012B amendment 1 and the IPC-4761, but other than 	coming up with the type of via-in-pad (type VII, filled and capped via) and wrap plating requirement, but neither really 	points me in the direction of what is acceptable.  But I could be looking right over what I need or maybe it is 	determined on an individual basis? 
	-Any recommended notes in regards to pad planarity in this regard would also be appreciated as I'm in the process of 	refining our own notes to come up with a standard note applicable to any vendor.  

Thank you in advance for any insight,

-Jeffrey
________________________________________


JEFFREY A. JENKINS, CID+
SR. PCB/CAD Designer
L-3 COMMUNICATIONS -
LINKABIT DIVSION
3033 Science Park Rd.
San Diego, CA 92121
Tel:  (858) 552-9832
Fax:  (858) 552-9487
[log in to unmask]

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