Subject: | |
From: | |
Reply To: | (Designers Council Forum) |
Date: | Wed, 28 Aug 2002 09:58:03 -0700 |
Content-Type: | text/plain |
Parts/Attachments: |
|
|
Description;
Work closely with product design engineer and other layout designers to
perform design layout of high speed/high density thru SMT/thru hole PCBs for
graphics and other PC related products. Perform high-density routing of
PCB's, develop symbols and CAD library databases using Mentor Graphics
Expedition (Veribest) design tool. Designs will need to follow EMI/RFI
control and FCC, UL and European regulations, IPC specifications and NRC
regulations. Knowledge of Gerber files, test reports, electronic PCB
documentation.
Qualifications;
* 1-2 years experience in PC graphics, motherboard design, RF or related
area.
* Knowledge with DFM/DFT/SMT constraints in volume manufacturing.
* 1 or 2 years at Mentor Graphics Expedition/Veribest.
This is a Junior Designer position.
This position is for a contract, the location is Los Angeles, CA.
Contact;
Mark Apton
Apton Associates
Phone: 408 241-1603
Pager/vm: 408 870-7253
Fax: 425 944-8699
---------------------------------------------------------------------------------
DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF DesignerCouncil.
To set a vacation stop for delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL
Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives
Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
---------------------------------------------------------------------------------
|
|
|