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March 2006

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Subject:
From:
Denis Lefebvre <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Thu, 30 Mar 2006 06:55:58 -0800
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Brad,

You probably learned that from Mary Sugden. I too, am a protégé of Mary's. But there is a bit more to it. The reason behind the rule is to prevent heat-sinking of solder joints and really only applies to wider power/ground traces. This is of particular importance on through-hole lands. The rule of thumb I've used for determining when a 'T' connection should be used rather than a daisy-chain is if the trace width is more than half the land diameter/width. I believe that this rule also applies to surface mount parts as well. 

There are those that have argued that since everything in the reflow oven heats up equally that there is no need for thermal relief to SMD solder joints. I disagree. Although it may be true that the whole mass heats up at once and all the solder becomes molten at about the same time, the solder joint forms when the solder cools down and returns to a solid state. That's where the trouble begins. If an SMD, a resistor or cap for example, has a small signal trace connected to one end and a massive power/gnd trace connected (in a daisy chain)to the other, which will cool down first? The one with the least amount of metal mass connected to it, of course. When this imbalance occurs, one end of the part will cool and form a solder joint before the other. This may result in things like tombstoning or skewing. The real key is to balance the copper connected to all the leads of a given device. One technique is to use two narrow tie straps from a wide power trace. If you'd like, I can send you a page from our design guidelines that illustrate 'preferred' routing techniques.

There should be no harm in daisy-chaining signal traces to pads, in fact it is preferred. 

Denis Lefebvre, CID+
Sr. PCB Designer
Finisar Corp
(408) 542-3832


-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Jaurique, Brad
Sent: Wednesday, March 29, 2006 4:38 PM
To: [log in to unmask]
Subject: [DC] Routing thru pads question


I am debate with some people in regards to routing through pads 
of components (i.e diodes, caps, Resistors)  I was always taught 
not to do this but I can't remember from whom. Especially with the smaller and smaller these parts are getting. But I am seeing this being done today more often at my work by other designers.

I also see necking down to route in between connectors,
and IC's.  

Please let me know what others are doing and why.

I am currently training 2 new designers to my company and I want to make sure I am guiding them in the right direction. 

 I never got the luxury of being guided at work but have taken many classes over the years from people such as Mary Sugden, Gary Ferrari, Wayne Pulliam and many more. This instructors have instilled in my a great set of design philosophies that have made me a successful designer and I want to make sure I do the same with whomever I get the luxury of training.

Thank you all for your help in advance.

  




Brad Jaurique C.I.D.
Senior PCB Designer
Pelco
(559)292-1981 ext. 2347
[log in to unmask]
Tell me and I forget;  Show me and I remember; Involve me and I understand. 
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