Andy,
In our preamp design, flip-chip has been our standard part. What you're
saying is true and these issues have been addressed. I am not against
necking down, I'm against necking down unnecessarily. I understand your
point and have the same concerns. I use a OSP finish on my flip chip,
which also helps retain the solder ball on the pad. We have an
additional problem because of the lead free requirement. At least you
get to work with a big part :)
Cheers,
Ron Scott C.I.D.
SR. PCB Designer
Texas Instruments
Storage Products Group
Tel: 214.567.4715
Cell: 972.816.7978
Fax: 972.761.5070
[log in to unmask]
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Andy
Kowalewski
Sent: Wednesday, July 27, 2005 20:51
To: [log in to unmask]
Subject: Re: [DC] Trace width ratio to pad
This is a serious issue with flipchip design, not so much for thermal
dissipation but for solder dispersal. Solder mask registration is a real
bear when it comes to flipchip pads, some of which get down to 150u
diameter
(6 mils) on 220u pitch (8.7 mils). In this case there is no solder mask
around any of the pads except facing the outer area of a die because a
registration tolerance of 50u (=2mil) and a minimum web requirement of
100u
(=4mils) which makes that a farce. Best solder mask registration I have
seen offered in production is +/- 35u with slight yield loss, or +/- 25u
with step and repeat imaging on a fab panel (super expensive - don't do
it!).
If you don't neck a power trace 100u (= 4mils) down to 50u (=2mils) the
wider trace usually steals some of the solder from the die's collapsing
ball and starves the joint of solder, occasionally leading to dry joints
in assembly but more usually to joints that are unreliable in the field.
Solder wicking down a close via hole is a well known phenomenom and the
same problem applies when you get down to really fine lines and spaces
on flipchips.
Strangely, we haven't had much of a problem with solder bridging, even
when an unconnected trace is 50, 75 or 100u away from the pad with no
intervening solder mask. The solder volume on a flipchip ball is so
small that surface tension tends to keep the solder on the pads even as
the balls collapse during reflow. I should add we don't screen paste for
flipchips, relying instead on dipping the pre-tinned and balled die in a
flux and placing on the board, with the balls acting as the only source
of solder. Works well.
Andy Kowalewski
[log in to unmask]
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of John
C Laur
Sent: Thursday, 28 July 2005 06:55
To: [log in to unmask]
Subject: Re: [DC] Trace width ratio to pad
All,
Wide conductors are great, BUT, wide conductors on a fine pitch QFP can
cause bridging. In affect you solder mask define the pads with the wide
traces creating solderable surfaces that may be ~4 mils closer than
intended. It happens when power and ground conductors are set up wider
than the signal conductors.
John Laur
Engineering Analyst Sr, HW
Information Platforms Business (IPB)
Rockwell Automation / Allen-Bradley
1201 South Second Street
Milwaukee, WI. 53204-2496 USA
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