DESIGNERCOUNCIL Archives

June 2004

DesignerCouncil@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Happy Holden <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Fri, 25 Jun 2004 12:44:45 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (76 lines)
Tom,
One assumes you are talking about 'microvia-in-pad' VIP and not drilled
through-hole via-in-pad.  The drilled TH's definitely need to be plugged
with a plated surface cap, The microvias can be filled or not depending on
price and fabricator capability.  From a design alternative, the via can
be in the center of the pad or off-center at the edge.  It can be just off
the pad and covered with soldermask (called an 'Inset microvia') or it
could be a dogbone connection (we assume there is no room for this or it
would have been done already).
Solectron did some assembly studies about the voiding with
'microvia-in-pad' and had a few conclusions.  Their report had a number of
good cross-sections about the issue.  The key is to get all the parties
talking early to decide what the trade-offs are.  There need not be a
problem if the issue is flushed out early enough.
SOLECTRON VIA IN PAD STUDY
* Via partially in pad show little voiding compared to the offset via
configuration.  Center via configuration had the most voiding. Inset and
dogbone via, little if any voiding.
* Large amount of voiding were observed on ENIG surface finish boards.
Very few on immersion silver.
* Smaller the pad size, more the voiding.  Generally, voiding defects(%)
for 0.5mm CSPs were higher than 0.8mm CSPs. Voiding on  1.0mm BGAs were
minimal.
* Next build will focus on the contribution of paste, reflow profile,
Air/N2 atmosphere to voiding.  This process was standard SMT.
        Need to investigate other micro-via construction techniques like
filled via, etc.
* Lead-free soldering may make the problem worse.

I have a couple of reports that have a lot of pictures and illustrations
on the issue and alternative solutions if you want.  Send me an email if
you would like them, I will give you an FTP Box to download them from.
They are to big for emailing.

Happy Holden
Westwood Associates





Tom Parkinson <[log in to unmask]>
Sent by: DesignerCouncil <[log in to unmask]>
06/25/2004 11:14 AM
Please respond to "(Designers Council Forum)"; Please respond to Tom
Parkinson


        To:     [log in to unmask]
        cc:
        Subject:        [DC] VIA in Pad


We're a CM.  One of our customers is asking us to build a board assembly
that will be using BGAs with VIAs in pads.  They are in the design stages
at
this point, and we have some concerns with having a Via in the middle of a
BGA pad.  Anyone have suggestions and/or experience with this??

Thanks


Tom Parkinson - Quality System Manager - CIT
WinTronics, Inc.
Ph: 724-981-5770 Ext. 235
Fax: 724-981-1772

---------------------------------------------------------------------------------
DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF DesignerCouncil.
To set a vacation stop for delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL
Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
---------------------------------------------------------------------------------

ATOM RSS1 RSS2